ARMEBS4  revision-26.06.2015
stm32f4x7_eth_bsp.h
Go to the documentation of this file.
1 /**
2  ******************************************************************************
3  * @file stm32f4x7_eth_bsp.h
4  * @author MCD Application Team
5  * @version V1.1.0
6  * @date 31-July-2013
7  * @brief Header for stm32f4x7_eth_bsp.c file.
8  ******************************************************************************
9  * @attention
10  *
11  * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
12  *
13  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14  * You may not use this file except in compliance with the License.
15  * You may obtain a copy of the License at:
16  *
17  * http://www.st.com/software_license_agreement_liberty_v2
18  *
19  * Unless required by applicable law or agreed to in writing, software
20  * distributed under the License is distributed on an "AS IS" BASIS,
21  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22  * See the License for the specific language governing permissions and
23  * limitations under the License.
24  *
25  ******************************************************************************
26  */
27 
28 /* Define to prevent recursive inclusion -------------------------------------*/
29 #ifndef __STM32F4x7_ETH_BSP_H
30 #define __STM32F4x7_ETH_BSP_H
31 
32 #ifdef __cplusplus
33  extern "C" {
34 #endif
35 
36 
37 /* Includes ------------------------------------------------------------------*/
38 #if defined (USE_STM324xG_EVAL)
39  #include "stm324xg_eval.h"
40  #include "stm324xg_eval_lcd.h"
41 
42 #elif defined (USE_STM324x7I_EVAL)
43  #include "stm324x7i_eval.h"
44  #include "stm324x7i_eval_lcd.h"
45 
46 #else
47 #include "heivs/bsp.h"
48  #if USE_LWIP || USE_ETHERNET
49  #include "config/eth_conf.h"
50  #endif
51 #endif
52 
53 /* Exported types ------------------------------------------------------------*/
54 /* Exported constants --------------------------------------------------------*/
55 /* Specific defines for EXTI line, used to manage Ethernet link status */
56 #define ETH_LINK_EXTI_LINE EXTI_Line14
57 #define ETH_LINK_EXTI_PORT_SOURCE EXTI_PortSourceGPIOB
58 #define ETH_LINK_EXTI_PIN_SOURCE EXTI_PinSource14
59 #define ETH_LINK_EXTI_IRQn EXTI15_10_IRQn
60 /* PB14 */
61 #define ETH_LINK_PIN GPIO_Pin_14
62 #define ETH_LINK_GPIO_PORT GPIOB
63 #define ETH_LINK_GPIO_CLK RCC_AHB1Periph_GPIOB
64 
65 /* Ethernet Flags for EthStatus variable */
66 #define ETH_INIT_FLAG 0x01 /* Ethernet Init Flag */
67 #define ETH_LINK_FLAG 0x10 /* Ethernet Link Flag */
68 
69 /* Exported macro ------------------------------------------------------------*/
70 /* Exported functions ------------------------------------------------------- */
71 
72 uint32_t Eth_Link_PHYITConfig(uint16_t PHYAddress);
73 void Eth_Link_EXTIConfig(void);
74 void Eth_Link_IT_task(void * pvParameters);
75 void Eth_Link_EXTIConfig(void);
76 
77 #include "heivs/config.h"
78 #if USE_LWIP
79 #include "lwip/lwip/netif.h"
80 void ETH_link_callback(struct netif *netif);
81 #endif
82 
83 #ifndef USE_Delay
84  #define _eth_delay_ ETH_Delay /* Default _eth_delay_ function with less precise timing */
85 #endif
86 
87 #define LAN8720_PHY_ADDRESS 0x00 /* Relative to STM324xG-EVAL Board */
88 
89 /**
90  ******************************************************************************
91  * @file stm32f4x7_eth_conf.h
92  * @author MCD Application Team
93  * @version V1.1.0
94  * @date 31-July-2013
95  * @brief Configuration file for the STM32F4x7 Ethernet driver.
96  ******************************************************************************
97  * @attention
98  *
99  * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
100  *
101  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
102  * You may not use this file except in compliance with the License.
103  * You may obtain a copy of the License at:
104  *
105  * http://www.st.com/software_license_agreement_liberty_v2
106  *
107  * Unless required by applicable law or agreed to in writing, software
108  * distributed under the License is distributed on an "AS IS" BASIS,
109  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
110  * See the License for the specific language governing permissions and
111  * limitations under the License.
112  *
113  ******************************************************************************
114  */
115 
116 /* Define to prevent recursive inclusion -------------------------------------*/
117 /* Includes ------------------------------------------------------------------*/
118 #include "stm32/stm32f4xx.h"
119 /* Exported types ------------------------------------------------------------*/
120 /* Exported constants --------------------------------------------------------*/
121 
122 /* PHY configuration section **************************************************/
123 #ifdef USE_Delay
124 /* PHY Reset delay */
125 #define PHY_RESET_DELAY ((uint32_t)0x000000FF)
126 /* PHY Configuration delay */
127 #define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF)
128 /* Delay when writing to Ethernet registers*/
129 #define ETH_REG_WRITE_DELAY ((uint32_t)0x00000001)
130 #else
131 /* PHY Reset delay */
132 #define PHY_RESET_DELAY ((uint32_t)0x000FFFFF)
133 /* PHY Configuration delay */
134 #define PHY_CONFIG_DELAY ((uint32_t)0x00FFFFFF)
135 /* Delay when writing to Ethernet registers*/
136 #define ETH_REG_WRITE_DELAY ((uint32_t)0x0000FFFF)
137 #endif
138 
139 /******************* PHY Extended Registers section : ************************/
140 
141 /* These values are relatives to DP83848 PHY and change from PHY to another,
142  so the user have to update this value depending on the used external PHY */
143 
144 /* The DP83848 PHY status register */
145 #define PHY_SR ((uint16_t)0x10) /* PHY status register Offset */
146 #define PHY_SPEED_STATUS ((uint16_t)0x0002) /* PHY Speed mask */
147 #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /* PHY Duplex mask */
148 
149 /* The DP83848 PHY: MII Interrupt Control Register */
150 #define PHY_MICR ((uint16_t)0x11) /* MII Interrupt Control Register */
151 #define PHY_MICR_INT_EN ((uint16_t)0x0002) /* PHY Enable interrupts */
152 #define PHY_MICR_INT_OE ((uint16_t)0x0001) /* PHY Enable output interrupt events */
153 
154 /* The DP83848 PHY: MII Interrupt Status and Misc. Control Register */
155 #define PHY_MISR ((uint16_t)0x12) /* MII Interrupt Status and Misc. Control Register */
156 #define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /* Enable Interrupt on change of link status */
157 #define PHY_LINK_STATUS ((uint16_t)0x2000) /* PHY link status interrupt mask */
158 
159  /* Note : Common PHY registers are defined in stm32f4x7_eth.h file */
160 
161 /* Exported macro ------------------------------------------------------------*/
162 /* Exported functions ------------------------------------------------------- */
163 
164 
165 
166 #ifdef __cplusplus
167 }
168 #endif
169 
170 #endif /* __STM32F4x7_ETH_BSP_H */
171 
172 
173 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
BSP - Board Support Package.
libheivs configuration file
CMSIS Cortex-M4 Device Peripheral Access Layer Header File. This file contains all the peripheral reg...