ARMEBS4  revision-26.06.2015
usb_conf_template.h
1 #include "heivs/config.h"
2 #if (USE_STM32_USB_HOST_MODE || USE_STM32_USB_USE_DEVICE_MODE || USE_STM32_USB_OTG_MODE)
3 /**
4  ******************************************************************************
5  * @file usb_conf.h
6  * @author MCD Application Team
7  * @version V2.1.0
8  * @date 19-March-2012
9  * @brief General low level driver configuration
10  ******************************************************************************
11  * @attention
12  *
13  * <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
14  *
15  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
16  * You may not use this file except in compliance with the License.
17  * You may obtain a copy of the License at:
18  *
19  * http://www.st.com/software_license_agreement_liberty_v2
20  *
21  * Unless required by applicable law or agreed to in writing, software
22  * distributed under the License is distributed on an "AS IS" BASIS,
23  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
24  * See the License for the specific language governing permissions and
25  * limitations under the License.
26  *
27  ******************************************************************************
28  */
29 
30 /* Define to prevent recursive inclusion -------------------------------------*/
31 #ifndef __USB_CONF__H__
32 #define __USB_CONF__H__
33 
34 /* Includes ------------------------------------------------------------------*/
35 #include "config/usb_conf.h"
36 
37 /** @addtogroup USB_OTG_DRIVER
38  * @{
39  */
40 
41 /** @defgroup USB_CONF
42  * @brief USB low level driver configuration file
43  * @{
44  */
45 
46 /** @defgroup USB_CONF_Exported_Defines
47  * @{
48  */
49 
50 /* USB Core and PHY interface configuration.
51  Tip: To avoid modifying these defines each time you need to change the USB
52  configuration, you can declare the needed define in your toolchain
53  compiler preprocessor.
54  */
55 /****************** USB OTG FS PHY CONFIGURATION *******************************
56 * The USB OTG FS Core supports one on-chip Full Speed PHY.
57 *
58 * The USE_EMBEDDED_PHY symbol is defined in the project compiler preprocessor
59 * when FS core is used.
60 *******************************************************************************/
61 #ifndef USE_USB_OTG_FS
62  //#define USE_USB_OTG_FS
63 #endif /* USE_USB_OTG_FS */
64 
65 #ifdef USE_USB_OTG_FS
66  #define USB_OTG_FS_CORE
67 #endif
68 
69 /****************** USB OTG HS PHY CONFIGURATION *******************************
70 * The USB OTG HS Core supports two PHY interfaces:
71 * (i) An ULPI interface for the external High Speed PHY: the USB HS Core will
72 * operate in High speed mode
73 * (ii) An on-chip Full Speed PHY: the USB HS Core will operate in Full speed mode
74 *
75 * You can select the PHY to be used using one of these two defines:
76 * (i) USE_ULPI_PHY: if the USB OTG HS Core is to be used in High speed mode
77 * (ii) USE_EMBEDDED_PHY: if the USB OTG HS Core is to be used in Full speed mode
78 *
79 * Notes:
80 * - The USE_ULPI_PHY symbol is defined in the project compiler preprocessor as
81 * default PHY when HS core is used.
82 * - On STM322xG-EVAL and STM324xG-EVAL boards, only configuration(i) is available.
83 * Configuration (ii) need a different hardware, for more details refer to your
84 * STM32 device datasheet.
85 *******************************************************************************/
86 #ifndef USE_USB_OTG_HS
87  //#define USE_USB_OTG_HS
88 #endif /* USE_USB_OTG_HS */
89 
90 #ifndef USE_ULPI_PHY
91  //#define USE_ULPI_PHY
92 #endif /* USE_ULPI_PHY */
93 
94 #ifndef USE_EMBEDDED_PHY
95  //#define USE_EMBEDDED_PHY
96 #endif /* USE_EMBEDDED_PHY */
97 
98 #ifdef USE_USB_OTG_HS
99  #define USB_OTG_HS_CORE
100 #endif
101 
102 /*******************************************************************************
103 * FIFO Size Configuration in Device mode
104 *
105 * (i) Receive data FIFO size = RAM for setup packets +
106 * OUT endpoint control information +
107 * data OUT packets + miscellaneous
108 * Space = ONE 32-bits words
109 * --> RAM for setup packets = 10 spaces
110 * (n is the nbr of CTRL EPs the device core supports)
111 * --> OUT EP CTRL info = 1 space
112 * (one space for status information written to the FIFO along with each
113 * received packet)
114 * --> data OUT packets = (Largest Packet Size / 4) + 1 spaces
115 * (MINIMUM to receive packets)
116 * --> OR data OUT packets = at least 2*(Largest Packet Size / 4) + 1 spaces
117 * (if high-bandwidth EP is enabled or multiple isochronous EPs)
118 * --> miscellaneous = 1 space per OUT EP
119 * (one space for transfer complete status information also pushed to the
120 * FIFO with each endpoint's last packet)
121 *
122 * (ii)MINIMUM RAM space required for each IN EP Tx FIFO = MAX packet size for
123 * that particular IN EP. More space allocated in the IN EP Tx FIFO results
124 * in a better performance on the USB and can hide latencies on the AHB.
125 *
126 * (iii) TXn min size = 16 words. (n : Transmit FIFO index)
127 * (iv) When a TxFIFO is not used, the Configuration should be as follows:
128 * case 1 : n > m and Txn is not used (n,m : Transmit FIFO indexes)
129 * --> Txm can use the space allocated for Txn.
130 * case2 : n < m and Txn is not used (n,m : Transmit FIFO indexes)
131 * --> Txn should be configured with the minimum space of 16 words
132 * (v) The FIFO is used optimally when used TxFIFOs are allocated in the top
133 * of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones.
134 *******************************************************************************/
135 
136 /*******************************************************************************
137 * FIFO Size Configuration in Host mode
138 *
139 * (i) Receive data FIFO size = (Largest Packet Size / 4) + 1 or
140 * 2x (Largest Packet Size / 4) + 1, If a
141 * high-bandwidth channel or multiple isochronous
142 * channels are enabled
143 *
144 * (ii) For the host nonperiodic Transmit FIFO is the largest maximum packet size
145 * for all supported nonperiodic OUT channels. Typically, a space
146 * corresponding to two Largest Packet Size is recommended.
147 *
148 * (iii) The minimum amount of RAM required for Host periodic Transmit FIFO is
149 * the largest maximum packet size for all supported periodic OUT channels.
150 * If there is at least one High Bandwidth Isochronous OUT endpoint,
151 * then the space must be at least two times the maximum packet size for
152 * that channel.
153 *******************************************************************************/
154 
155 /****************** USB OTG HS CONFIGURATION **********************************/
156 #ifdef USB_OTG_HS_CORE
157  #define RX_FIFO_HS_SIZE 512
158  #define TX0_FIFO_HS_SIZE 512
159  #define TX1_FIFO_HS_SIZE 512
160  #define TX2_FIFO_HS_SIZE 0
161  #define TX3_FIFO_HS_SIZE 0
162  #define TX4_FIFO_HS_SIZE 0
163  #define TX5_FIFO_HS_SIZE 0
164  #define TXH_NP_HS_FIFOSIZ 96
165  #define TXH_P_HS_FIFOSIZ 96
166 
167 // #define USB_OTG_HS_LOW_PWR_MGMT_SUPPORT
168 // #define USB_OTG_HS_SOF_OUTPUT_ENABLED
169 
170 // #define USB_OTG_INTERNAL_VBUS_ENABLED
171  #define USB_OTG_EXTERNAL_VBUS_ENABLED
172 
173  #ifdef USE_ULPI_PHY
174  #define USB_OTG_ULPI_PHY_ENABLED
175  #endif
176  #ifdef USE_EMBEDDED_PHY
177  #define USB_OTG_EMBEDDED_PHY_ENABLED
178  #endif
179  #define USB_OTG_HS_INTERNAL_DMA_ENABLED
180  #define USB_OTG_HS_DEDICATED_EP1_ENABLED
181 #endif
182 
183 /****************** USB OTG FS CONFIGURATION **********************************/
184 #ifdef USB_OTG_FS_CORE
185  #define RX_FIFO_FS_SIZE 128
186  #define TX0_FIFO_FS_SIZE 64
187  #define TX1_FIFO_FS_SIZE 128
188  #define TX2_FIFO_FS_SIZE 0
189  #define TX3_FIFO_FS_SIZE 0
190  #define TXH_NP_HS_FIFOSIZ 96
191  #define TXH_P_HS_FIFOSIZ 96
192 
193 // #define USB_OTG_FS_LOW_PWR_MGMT_SUPPORT
194 // #define USB_OTG_FS_SOF_OUTPUT_ENABLED
195 #endif
196 
197 /****************** USB OTG MISC CONFIGURATION ********************************/
198 //#define VBUS_SENSING_ENABLED
199 
200 /****************** USB OTG MODE CONFIGURATION ********************************/
201 //#define USE_HOST_MODE
202 #define USE_DEVICE_MODE
203 //#define USE_OTG_MODE
204 
205 #ifndef USB_OTG_FS_CORE
206  #ifndef USB_OTG_HS_CORE
207  #error "USB_OTG_HS_CORE or USB_OTG_FS_CORE should be defined"
208  #endif
209 #endif
210 
211 #ifndef USE_DEVICE_MODE
212  #ifndef USE_HOST_MODE
213  #error "USE_DEVICE_MODE or USE_HOST_MODE should be defined"
214  #endif
215 #endif
216 
217 #ifndef USE_USB_OTG_HS
218  #ifndef USE_USB_OTG_FS
219  #error "USE_USB_OTG_HS or USE_USB_OTG_FS should be defined"
220  #endif
221 #else //USE_USB_OTG_HS
222  #ifndef USE_ULPI_PHY
223  #ifndef USE_EMBEDDED_PHY
224  #error "USE_ULPI_PHY or USE_EMBEDDED_PHY should be defined"
225  #endif
226  #endif
227 #endif
228 
229 /****************** C Compilers dependant keywords ****************************/
230 /* In HS mode and when the DMA is used, all variables and data structures dealing
231  with the DMA during the transaction process should be 4-bytes aligned */
232 #ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
233  #if defined (__GNUC__) /* GNU Compiler */
234  #define __ALIGN_END __attribute__ ((aligned (4)))
235  #define __ALIGN_BEGIN
236  #else
237  #define __ALIGN_END
238  #if defined (__CC_ARM) /* ARM Compiler */
239  #define __ALIGN_BEGIN __align(4)
240  #elif defined (__ICCARM__) /* IAR Compiler */
241  #define __ALIGN_BEGIN
242  #elif defined (__TASKING__) /* TASKING Compiler */
243  #define __ALIGN_BEGIN __align(4)
244  #endif /* __CC_ARM */
245  #endif /* __GNUC__ */
246 #else
247  #define __ALIGN_BEGIN
248  #define __ALIGN_END
249 #endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
250 
251 /* __packed keyword used to decrease the data type alignment to 1-byte */
252 #if defined (__CC_ARM) /* ARM Compiler */
253  #define __packed __packed
254 #elif defined (__ICCARM__) /* IAR Compiler */
255  #define __packed __packed
256 #elif defined ( __GNUC__ ) /* GNU Compiler */
257  #define __packed __attribute__ ((__packed__))
258 #elif defined (__TASKING__) /* TASKING Compiler */
259  #define __packed __unaligned
260 #endif /* __CC_ARM */
261 
262 /**
263  * @}
264  */
265 
266 
267 /** @defgroup USB_CONF_Exported_Types
268  * @{
269  */
270 /**
271  * @}
272  */
273 
274 
275 /** @defgroup USB_CONF_Exported_Macros
276  * @{
277  */
278 /**
279  * @}
280  */
281 
282 /** @defgroup USB_CONF_Exported_Variables
283  * @{
284  */
285 /**
286  * @}
287  */
288 
289 /** @defgroup USB_CONF_Exported_FunctionsPrototype
290  * @{
291  */
292 /**
293  * @}
294  */
295 
296 
297 #endif //__USB_CONF__H__
298 
299 
300 /**
301  * @}
302  */
303 
304 /**
305  * @}
306  */
307 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
308 #endif /* (USE_STM32_USB_HOST_MODE || USE_STM32_USB_USE_DEVICE_MODE || USE_STM32_USB_OTG_MODE) */
config.h
libheivs configuration file
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