2 #if (USE_STM32_USB_HOST_MODE || USE_STM32_USB_USE_DEVICE_MODE || USE_STM32_USB_OTG_MODE)
35 #include "stm32/usb/usb_hcd.h"
60 typedef struct _USBH_HCD_INT
62 uint8_t (* SOF) (USB_OTG_CORE_HANDLE *pdev);
63 uint8_t (* DevConnected) (USB_OTG_CORE_HANDLE *pdev);
64 uint8_t (* DevDisconnected) (USB_OTG_CORE_HANDLE *pdev);
66 }USBH_HCD_INT_cb_TypeDef;
68 extern USBH_HCD_INT_cb_TypeDef *USBH_HCD_INT_fops;
78 #define CLEAR_HC_INT(HC_REGS, intr) \
80 USB_OTG_HCINTn_TypeDef hcint_clear; \
81 hcint_clear.d32 = 0; \
82 hcint_clear.b.intr = 1; \
83 USB_OTG_WRITE_REG32(&((HC_REGS)->HCINT), hcint_clear.d32);\
86 #define MASK_HOST_INT_CHH(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \
87 INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
88 INTMSK.b.chhltd = 0; \
89 USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);}
91 #define UNMASK_HOST_INT_CHH(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \
92 INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
93 INTMSK.b.chhltd = 1; \
94 USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);}
96 #define MASK_HOST_INT_ACK(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \
97 INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
99 USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, GINTMSK.d32);}
101 #define UNMASK_HOST_INT_ACK(hc_num) { USB_OTG_HCGINTMSK_TypeDef INTMSK; \
102 INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
104 USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);}
121 void ConnectCallback_Handler(USB_OTG_CORE_HANDLE *pdev);
122 void Disconnect_Callback_Handler(USB_OTG_CORE_HANDLE *pdev);
123 void Overcurrent_Callback_Handler(USB_OTG_CORE_HANDLE *pdev);
124 uint32_t USBH_OTG_ISR_Handler (USB_OTG_CORE_HANDLE *pdev);
132 #endif //__HCD_INT_H__
libheivs configuration file