bsp_envirobot_sc.c

/************************************************************************//**
 * \file    bsp.h
 * \brief   BSP for Envirobot Sensor Control
 * \author  marc dot pignat at hevs dot ch
 ***************************************************************************/

#if defined (BOARD_ENVIROBOT_SC)
#include "heivs/bsp.h"

#include "stm32/stm32f4xx_fsmc.h"
#include "stm32/stm32f4xx_rcc.h"
#include "heivs/ram_test.h"
#include "heivs/time.h"
#include "heivs/delay.h"
#include "heivs/retarget.h"

/**
 * Pins used by the FSCM (SDRAM)
 */
static const struct gpio_t fscm_pins[] =
{
    // Addresses
    GPIO_FSMC_A0_PF0,
    GPIO_FSMC_A1_PF1,
    GPIO_FSMC_A2_PF2,
    GPIO_FSMC_A3_PF3,
    GPIO_FSMC_A4_PF4,
    GPIO_FSMC_A5_PF5,
    GPIO_FSMC_A6_PF12,
    GPIO_FSMC_A7_PF13,
    GPIO_FSMC_A8_PF14,
    GPIO_FSMC_A9_PF15,
    GPIO_FSMC_A10_PG0,
    GPIO_FSMC_A11_PG1,

    // Datas
    GPIO_FSMC_D0_PD14,
    GPIO_FSMC_D1_PD15,
    GPIO_FSMC_D2_PD0,
    GPIO_FSMC_D3_PD1,
    GPIO_FSMC_D4_PE7,
    GPIO_FSMC_D5_PE8,
    GPIO_FSMC_D6_PE9,
    GPIO_FSMC_D7_PE10,
    GPIO_FSMC_D8_PE11,
    GPIO_FSMC_D9_PE12,
    GPIO_FSMC_D10_PE13,
    GPIO_FSMC_D11_PE14,
    GPIO_FSMC_D12_PE15,
    GPIO_FSMC_D13_PD8,
    GPIO_FSMC_D14_PD9,
    GPIO_FSMC_D15_PD10,

    // Control

    // SDNWE
    DEF_GPIOC( 0, GPIO_AF       | GPIO_PP   | GPIO_SPEED_100 |  GPIO_NOPULL |   GPIO_AF_FSMC),

    // BA0-BA1
    DEF_GPIOG( 0, GPIO_AF       | GPIO_PP   | GPIO_SPEED_100 |  GPIO_NOPULL |   GPIO_AF_FSMC),
    DEF_GPIOG( 1, GPIO_AF       | GPIO_PP   | GPIO_SPEED_100 |  GPIO_NOPULL |   GPIO_AF_FSMC),

    // SDCLK
    DEF_GPIOG( 8, GPIO_AF       | GPIO_PP   | GPIO_SPEED_100 |  GPIO_NOPULL |   GPIO_AF_FSMC),

    // SDNCAS
    DEF_GPIOG(15, GPIO_AF       | GPIO_PP   | GPIO_SPEED_100 |  GPIO_NOPULL |   GPIO_AF_FSMC),

    // SDNRAS
    DEF_GPIOF(11, GPIO_AF       | GPIO_PP   | GPIO_SPEED_100 |  GPIO_NOPULL |   GPIO_AF_FSMC),

    // SDCKE1
    DEF_GPIOB( 5, GPIO_AF       | GPIO_PP   | GPIO_SPEED_100 |  GPIO_NOPULL |   GPIO_AF_FSMC),

    // SDNE1
    DEF_GPIOB( 6, GPIO_AF       | GPIO_PP   | GPIO_SPEED_100 |  GPIO_NOPULL |   GPIO_AF_FSMC),

    GPIO_FSMC_BLN1_PE1,
    GPIO_FSMC_NBL0_PE0,
};

/**
  * @brief Flexible Memory Controller Bank5_6
  */

typedef struct
{
  __IO uint32_t SDCR[2];        /*!< SDRAM Control registers ,      Address offset: 0x140-0x144  */
  __IO uint32_t SDTR[2];        /*!< SDRAM Timing registers ,       Address offset: 0x148-0x14C  */
  __IO uint32_t SDCMR;       /*!< SDRAM Command Mode register,    Address offset: 0x150  */
  __IO uint32_t SDRTR;       /*!< SDRAM Refresh Timer register,   Address offset: 0x154  */
  __IO uint32_t SDSR;        /*!< SDRAM Status register,          Address offset: 0x158  */
} FMC_Bank5_6_TypeDef;

#define FMC_R_BASE            ((uint32_t)0xA0000000) /*!< FMC registers base address                                                 */
#define FMC_Bank5_6         ((FMC_Bank5_6_TypeDef *) FMC_Bank5_6_R_BASE)
#define FMC_Bank5_6_R_BASE    (FMC_R_BASE + 0x0140)


/**
  * @brief  Setup the external memory controller.
  *         borrowed from stm32fcube v1.3
  * @param  None
  * @retval None
  */
static void SystemInit_ExtMemCtl(void)
{
  uint32_t tmpreg = 0, timeout = 0xFFFF;

  /* Enable GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, and GPIOG interface
      clock */
  RCC->AHB1ENR |= 0x0000007E;

  /* Connect PBx pins to FMC Alternate function */
  GPIOB->AFR[0]  = 0x0CC00000;
  GPIOB->AFR[1]  = 0x00000000;
  /* Configure PBx pins in Alternate function mode */
  GPIOB->MODER   = 0x00002A80;
  /* Configure PBx pins speed to 50 MHz */
  GPIOB->OSPEEDR = 0x000028C0;
  /* Configure PBx pins Output type to push-pull */
  GPIOB->OTYPER  = 0x00000000;
  /* No pull-up, pull-down for PBx pins */
  GPIOB->PUPDR   = 0x00000100;

  /* Connect PCx pins to FMC Alternate function */
  GPIOC->AFR[0]  = 0x0000000C;
  GPIOC->AFR[1]  = 0x00000000;
  /* Configure PCx pins in Alternate function mode */
  GPIOC->MODER   = 0x00000002;
  /* Configure PCx pins speed to 50 MHz */
  GPIOC->OSPEEDR = 0x00000002;
  /* Configure PCx pins Output type to push-pull */
  GPIOC->OTYPER  = 0x00000000;
  /* No pull-up, pull-down for PCx pins */
  GPIOC->PUPDR   = 0x00000000;

  /* Connect PDx pins to FMC Alternate function */
  GPIOD->AFR[0]  = 0x000000CC;
  GPIOD->AFR[1]  = 0xCC000CCC;
  /* Configure PDx pins in Alternate function mode */
  GPIOD->MODER   = 0xA02A000A;
  /* Configure PDx pins speed to 50 MHz */
  GPIOD->OSPEEDR = 0xA02A000A;
  /* Configure PDx pins Output type to push-pull */
  GPIOD->OTYPER  = 0x00000000;
  /* No pull-up, pull-down for PDx pins */
  GPIOD->PUPDR   = 0x00000000;

  /* Connect PEx pins to FMC Alternate function */
  GPIOE->AFR[0]  = 0xC00000CC;
  GPIOE->AFR[1]  = 0xCCCCCCCC;
  /* Configure PEx pins in Alternate function mode */
  GPIOE->MODER   = 0xAAAA800A;
  /* Configure PEx pins speed to 50 MHz */
  GPIOE->OSPEEDR = 0xAAAA800A;
  /* Configure PEx pins Output type to push-pull */
  GPIOE->OTYPER  = 0x00000000;
  /* No pull-up, pull-down for PEx pins */
  GPIOE->PUPDR   = 0x00000000;

  /* Connect PFx pins to FMC Alternate function */
  GPIOF->AFR[0]  = 0x00CCCCCC;
  GPIOF->AFR[1]  = 0xCCCCC000;
  /* Configure PFx pins in Alternate function mode */
  GPIOF->MODER   = 0xAA800AAA;
  /* Configure PFx pins speed to 50 MHz */
  GPIOF->OSPEEDR = 0xAA800AAA;
  /* Configure PFx pins Output type to push-pull */
  GPIOF->OTYPER  = 0x00000000;
  /* No pull-up, pull-down for PFx pins */
  GPIOF->PUPDR   = 0x00000000;

  /* Connect PGx pins to FMC Alternate function */
  GPIOG->AFR[0]  = 0x00CC00CC;
  GPIOG->AFR[1]  = 0xC000000C;
  /* Configure PGx pins in Alternate function mode */
  GPIOG->MODER   = 0x80020A0A;
  /* Configure PGx pins speed to 50 MHz */
  GPIOG->OSPEEDR = 0x80020A0A;
  /* Configure PGx pins Output type to push-pull */
  GPIOG->OTYPER  = 0x00000000;
  /* No pull-up, pull-down for PGx pins */
  GPIOG->PUPDR   = 0x00000000;


/*-- FMC Configuration ------------------------------------------------------*/
  /* Enable the FMC interface clock */
  RCC->AHB3ENR |= 0x00000001;

  /* Configure and enable SDRAM bank2 */
  FMC_Bank5_6->SDCR[0] = 0x00002800;
  FMC_Bank5_6->SDCR[1] = 0x000001D4;
  FMC_Bank5_6->SDTR[0] = 0x00106000;
  FMC_Bank5_6->SDTR[1] = 0x00010361;

  /* SDRAM initialization sequence */
  /* Clock enable command - BANK2 0x08, BANK1 0x10 */
  FMC_Bank5_6->SDCMR = 0x08 | 0x01;
  tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
  while((tmpreg != 0) && (timeout-- > 0))
  {
    tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
  }

  /* Delay */
  delay_wait_ms(1);

  /* PALL command */
  FMC_Bank5_6->SDCMR = 0x08 | 0x02;
  timeout = 0xFFFF;
  while((tmpreg != 0) && (timeout-- > 0))
  {
    tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
  }

  /* Auto refresh command */
  FMC_Bank5_6->SDCMR = 0x08 | 0x03 | 0x60;
  timeout = 0xFFFF;
  while((tmpreg != 0) && (timeout-- > 0))
  {
    tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
  }

  /* MRD register program */
  FMC_Bank5_6->SDCMR = 0x08 | 0x04 | 0x00046200;
  timeout = 0xFFFF;
  while((tmpreg != 0) && (timeout-- > 0))
  {
    tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
  }

  /* Set refresh count */
  tmpreg = FMC_Bank5_6->SDRTR; // 64 ms / 8192 rows = 7.81us
  FMC_Bank5_6->SDRTR = (tmpreg | (683 << 1)); // (7.81us * 90 MHz) - 20 = 682.9

  /* Disable write protection */
  tmpreg = FMC_Bank5_6->SDCR[1];
  FMC_Bank5_6->SDCR[1] = (tmpreg & 0xFFFFFDFF);
}

/**
 * \brief init FSMC and related pins
 *
 * On this board the external SDRAM
 */
static status_e bsp_init_FSMC(void)
{
    // Setup gpios
    gpio_setup_list(fscm_pins, ARRAY_SIZE(fscm_pins));

    SystemInit_ExtMemCtl();
    return NO_ERROR;
}

/**
 * \brief Load .ext_ram_data and zero .ext_ram_bss
 */
static void load_init_external_ram(void)
{
    extern uint8_t __ext_ram_bss_start;
    extern uint8_t __ext_ram_bss_end;

    extern uint8_t __ext_ram_dst_start;
    extern uint8_t __ext_ram_dst_end;
    extern uint8_t __ext_ram_src_start;

    memset(&__ext_ram_bss_start, 0x0, &__ext_ram_bss_end - &__ext_ram_bss_start);
    memcpy(&__ext_ram_dst_start,&__ext_ram_src_start, &__ext_ram_dst_end - & __ext_ram_dst_start);
}

static const struct gpio_t led0_pin = DEF_GPIOD(11, GPIO_PP | GPIO_OUTPUT_0);
static void bsp_pwm_leds_init(uint32_t frequency, uint32_t steps, uint32_t initial)
{
    const struct gpio_t pins[] =
    {
        led0_pin,
        GPIO_TIM4_CH1_PD12,
        GPIO_TIM4_CH2_PD13,
    };

    /* Pin setup */
    gpio_setup_list(pins, ARRAY_SIZE(pins));

    /* Enable the timer clock */
    RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);

    /* Reset the timer */
    RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, ENABLE);
    RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, DISABLE);

    TIM4->CCER =
              TIM_CCER_CC1E
            | TIM_CCER_CC2E
        ;

    /**
     * Timer frequency = steps * input_frequency
     */
    TIM4->PSC = (((SystemClock.timer)/steps)/frequency) - 1;

    /**
     * Count steps (from zero to steps - 1)
     */
    TIM4->ARR = steps - 1;

    /* Set the output value to 50 % */
    TIM4->CCR1 = initial;
    TIM4->CCR2 = initial;

    TIM4->CCMR1 =
                TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1PE
              | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2PE;
        ;

    /* Update registers now */
    TIM4->EGR |= TIM_EGR_UG;

    /* Start the timer */
    TIM4->CR1 = TIM_CR1_ARPE | TIM_CR1_CEN;
}

void bsp_led_set_pwm(uint32_t nr, uint32_t value)
{
    if (nr == 0)
    {
        gpio_set(&led0_pin, value);
        return;
    }

    nr--;
    if (nr < 2)
    {
        volatile uint32_t *addr[] =
        {
            &TIM4->CCR1,
            &TIM4->CCR2,
        };

        *addr[nr] = lightness_to_pwm(value);
    }
}

void bsp_led_set(uint32_t nr, uint32_t value)
{
    bsp_led_set_pwm(nr, value > 0 ? LIGHTNESS_PWM_STEP : 0);
}

void bsp_led_toggle(uint32_t nr)
{
    if (nr == 0)
    {
        gpio_toggle(&led0_pin);
        return;
    }
    nr--;

    if (nr < 2)
    {
        volatile uint32_t *addr[] =
        {
            &TIM4->CCR1,
            &TIM4->CCR2,
        };

        if (*addr[nr])
        {
            *addr[nr] = 0;
        }
        else
        {
            *addr[nr] = LIGHTNESS_PWM_STEP;
        }
    }
}
/**
 * \brief Buttons
 */
static const struct gpio_t bsp_buttons[BSP_BUTTON_NR] =
{
    DEF_GPIOG( 2, GPIO_INPUT | GPIO_PULLUP | GPIO_SPEED_2),
    DEF_GPIOG( 3, GPIO_INPUT | GPIO_PULLUP | GPIO_SPEED_2)
};

/**
 * \brief initialize buttons
 */
static status_e bsp_buttons_init(void)
{
    gpio_setup_list(bsp_buttons, ARRAY_SIZE(bsp_buttons));

    return NO_ERROR;
}

uint32_t bsp_button_get(uint32_t nr)
{
    if (nr >= BSP_BUTTON_NR)
    {
        return 0;
    }

    return !gpio_get(&bsp_buttons[nr]);
}

const struct gpio_t *bsp_button_gpios(void)
{
    return &bsp_buttons[0];
}

/**
 * \brief OTG VBUS not enable pin
 */
const struct gpio_t gpio_vbus_not = PIN_VBUS_NOT;

/**
 * \brief Safe pin state
 *
 * Safe state defined in this order :
 * * JTAG pins in JTAG mode
 * * External devices in reset or shutdown mode
 * * connected pins in input mode
 * * unconnected pins in input with pull-up
 */
static const struct gpio_t all_pins_safe_values[] =
{
    /**
     * FIXME
     *
     * Take the schematics, and fix this list.
     */
#if 0
    DEF_GPIOA( 0, GPIO_AN),
    DEF_GPIOA( 1, GPIO_INPUT),
    DEF_GPIOA( 2, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOA( 3, GPIO_INPUT),
    DEF_GPIOA( 4, GPIO_OUTPUT_1),
    DEF_GPIOA( 5, GPIO_AN),
    DEF_GPIOA( 6, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOA( 7, GPIO_INPUT),
    DEF_GPIOA( 8, GPIO_INPUT | GPIO_PULLDOWN),
    DEF_GPIOA( 9, GPIO_INPUT),
    DEF_GPIOA(10, GPIO_INPUT),
    DEF_GPIOA(11, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOA(12, GPIO_INPUT | GPIO_PULLUP),
    // JTAG
    GPIO_JTMS_SWDIO_PA13,
    GPIO_JTCK_SWCLK_PA14,
    GPIO_JTDI_PA15,

    DEF_GPIOB( 0, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOB( 1, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOB( 2, GPIO_INPUT | GPIO_PULLUP),

    // JTAG
    GPIO_JTDO_TRACESWO_PB3,
    GPIO_NJTRST_PB4,
    DEF_GPIOB( 5, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOB( 6, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOB( 7, GPIO_INPUT),
    DEF_GPIOB( 8, GPIO_INPUT),
    DEF_GPIOB( 9, GPIO_INPUT),
    DEF_GPIOB(10, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOB(11, GPIO_INPUT),
    DEF_GPIOB(12, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOB(13, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOB(14, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOB(15, GPIO_INPUT | GPIO_PULLUP),

    DEF_GPIOC( 0, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOC( 1, GPIO_INPUT),
    DEF_GPIOC( 2, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOC( 3, GPIO_AN),
    DEF_GPIOC( 4, GPIO_INPUT),
    DEF_GPIOC( 5, GPIO_INPUT),
    DEF_GPIOC( 6, GPIO_INPUT | GPIO_PULLDOWN),
    DEF_GPIOC( 7, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOC( 8, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOC( 9, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOC(10, GPIO_INPUT | GPIO_PULLDOWN),
    DEF_GPIOC(11, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOC(12, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOC(13, GPIO_INPUT | GPIO_PULLDOWN),
    DEF_GPIOC(14, GPIO_INPUT),
    DEF_GPIOC(15, GPIO_INPUT),

    DEF_GPIOD( 0, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOD( 1, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOD( 2, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOD( 3, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOD( 4, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOD( 5, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOD( 6, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOD( 7, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOD( 8, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOD( 9, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOD(10, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOD(11, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOD(12, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOD(13, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOD(14, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOD(15, GPIO_INPUT | GPIO_PULLUP),

    DEF_GPIOE( 0, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOE( 1, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOE( 2, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOE( 3, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOE( 4, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOE( 5, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOE( 6, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOE( 7, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOE( 8, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOE( 9, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOE(10, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOE(11, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOE(12, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOE(13, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOE(14, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOE(15, GPIO_INPUT | GPIO_PULLUP),

    DEF_GPIOF( 0, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOF( 1, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOF( 2, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOF( 3, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOF( 4, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOF( 5, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOF( 6, GPIO_INPUT | GPIO_PULLDOWN),
    DEF_GPIOF( 7, GPIO_INPUT | GPIO_PULLDOWN),
    DEF_GPIOF( 8, GPIO_INPUT | GPIO_PULLDOWN),
    DEF_GPIOF( 9, GPIO_INPUT | GPIO_PULLDOWN),
    PIN_VBUS_NOT,
    DEF_GPIOF(11, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOF(12, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOF(13, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOF(14, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOF(15, GPIO_INPUT | GPIO_PULLUP),

    DEF_GPIOG( 0, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOG( 1, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOG( 2, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOG( 3, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOG( 4, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOG( 5, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOG( 6, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOG( 7, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOG( 8, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOG( 9, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOG(10, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOG(11, GPIO_INPUT | GPIO_PULLDOWN),
    DEF_GPIOG(12, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOG(13, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOG(14, GPIO_INPUT | GPIO_PULLUP),
    PIN_WD,

    DEF_GPIOH( 0, GPIO_INPUT),
    DEF_GPIOH( 1, GPIO_INPUT),
    PIN_RESET_NOT_CAMERA,
    PIN_RESET_NOT_SCREEN,
    DEF_GPIOH( 4, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOH( 5, GPIO_INPUT | GPIO_PULLUP),
    PIN_RESET_NOT_ETHERNET,
    DEF_GPIOH( 7, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOH( 8, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOH( 9, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOH(10, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOH(11, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOH(12, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOH(13, GPIO_INPUT | GPIO_PULLDOWN),
    DEF_GPIOH(14, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOH(15, GPIO_INPUT | GPIO_PULLUP),

    DEF_GPIOI( 0, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOI( 1, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOI( 2, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOI( 3, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOI( 4, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOI( 5, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOI( 6, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOI( 7, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOI( 8, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOI( 9, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOI(10, GPIO_INPUT | GPIO_PULLUP),
    DEF_GPIOI(11, GPIO_INPUT | GPIO_PULLUP),
#endif
};

status_e bsp_init(void)
{
    status_e status;

    // Set all pins to safe values
    gpio_setup_list(all_pins_safe_values, ARRAY_SIZE(all_pins_safe_values));

    // Set OTG VBUS to off
    gpio_setup(&gpio_vbus_not);

    // Initialize time early, it is required by many other functions
    time_init();

    // Initialize the LEDs
    bsp_pwm_leds_init(10*1000, BSP_PWM_LED_STEPS, 0);
    bsp_led_set_pwm(0, 50);
    bsp_led_set_pwm(1, 50);
    bsp_led_set_pwm(2, 50);

    // Initialize stdin/stdout
    retarget_init();

    // Initialize buttons
    status = bsp_buttons_init();
    if (status != NO_ERROR)
    {
        return status;
    }

    /**
     * FIXME
     *
     * The SDRAM init code is not working, so there is no reason to run it
     * and even less reason to prevent boot when it's not working.
     **/
#if 0
    // Initialize the external (address/data) bus
    status = bsp_init_FSMC();
    if (status != NO_ERROR)
    {
        return status;
    }

    /* Quick test the external RAM */
    status = ram_test_basic((uint32_t *)EXT_SDRAM_BASE, EXT_SDRAM_SIZE);
    if (status != NO_ERROR)
    {
        return status;
    }

    // Initialize external ram sections
    load_init_external_ram();
#endif
    return NO_ERROR;

}
#if (USE_STM32_USB_HOST_MODE || USE_STM32_USB_USE_DEVICE_MODE || USE_STM32_USB_OTG_MODE)
#include "stm32/usb/usb_core.h"
#include "heivs/delay.h"

void USB_OTG_BSP_DriveVBUS(USB_OTG_CORE_HANDLE *pdev, uint8_t state)
{
    (void)pdev;
    const struct gpio_t gpio_vbus_not = PIN_VBUS_NOT;
    gpio_set(&gpio_vbus_not, !state);
}

void  USB_OTG_BSP_ConfigVBUS(USB_OTG_CORE_HANDLE *pdev)
{
    const struct gpio_t gpio_vbus_not = PIN_VBUS_NOT;
    gpio_setup(&gpio_vbus_not);
    USB_OTG_BSP_DriveVBUS (pdev, 0);

    delay_wait_ms(200);
}
#endif /* (USE_STM32_USB_HOST_MODE || USE_STM32_USB_USE_DEVICE_MODE || USE_STM32_USB_OTG_MODE) */

#endif