startup_stm32f4xx.c

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/************************************************************************//**
 * \file    heivs/startup_stm32f4xx.c
 * \brief   startup file for stm32f4xx
 *
 * \author  marc dot pignat at hevs dot ch
 *
 * ARM Holdings said there is no need for assembly with Cortex-Mx, so here is
 * the startup code, entirely in C ;)
 *
 * \warning The only thing that is ready before Reset is the stack.
 *          .bss and .data sections aren't ready.
 *
 * \warning The syntax is GCC specific, but in any case the assembler syntax is
 *          not portable
 *
 * \warning This file is heavily dependent on the linker scrpit and on newlib
 *
 ***************************************************************************/

#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include "stm32/system_stm32f4xx.h"
#include "stm32/stm32f4xx_misc.h"
#include "stm32/stm32f4xx_rcc.h"
#include "heivs/error.h"
#include "heivs/bsp.h"
#include "heivs/delay.h"
#include "heivs/config.h"

#include <time.h>
#include <sys/time.h>

#if USE_FREERTOS
#include "freertos/FreeRTOS.h"
#endif

/************************************************************************//**
 * \addtogroup init
 * @{
 ***************************************************************************/

/**
 * \brief CCM RAM initialization
 *
 * The CCM (Core Coupled Memory) is a RAM only available for the CPU.
 * \warning It is not available for other AHB masters (DMA).
 * \warning It can not hold executable code (data only).
 *
 * This function will copy .ccm_ram.data from flash and initialize .ccm_ram.bss
 * sections.
 */
static void init_ccm_ram(void)
{
    // External values set by the linker
    extern uint8_t __ccm_ram_bss_start; ///< .ccm_ram.bss start in CCM
    extern uint8_t __ccm_ram_bss_end;   ///< .ccm_ram.bss end in CCM

    extern uint8_t __ccm_ram_dst_start; ///< .ccm_ram.data start in flash
    extern uint8_t __ccm_ram_dst_end;   ///< .ccm_ram.data start in CCM
    extern uint8_t __ccm_ram_src_start; ///< .ccm_ram.data end in CCM

    memset(&__ccm_ram_bss_start, 0x0, &__ccm_ram_bss_end - &__ccm_ram_bss_start);
    memcpy(&__ccm_ram_dst_start,&__ccm_ram_src_start, &__ccm_ram_dst_end - & __ccm_ram_dst_start);
}


/**
 * \brief Interrupts initializations
 *
 * Vectors are copied from flash to RAM, so they can be updated at runtime.
 */
static void interrupts_init(void)
{
    // External values set by the linker
    extern uint8_t _vectors_flash_start;    ///< vectors start in flash
    extern uint8_t _vectors_flash_end;      ///< vectors end in flash
    extern uint8_t _vectors_ram_start;      ///< vectors start in ram

    // Copy vectors from flash to RAM.
    memcpy(&_vectors_ram_start, &_vectors_flash_start, &_vectors_flash_end - &_vectors_flash_start);

    // Tell the NVIC to use the new vectors
    NVIC_SetVectorTable(SRAM_BASE, 0x00000000);

    // Set priority bits in NVIC
    // The FreeRTOS port for stm32 depends on this value
    NVIC_PriorityGroupConfig(NVIC_PriorityGroup_4);
}

/**
 * \brief Initialize newlib c++ runtime
 */
static void libc_init_array(void)
{
    //
    // __libc_[init/fini]_array plays with the linker script to handle
    // constructor and destructors outside functions
    //

    #ifdef HAVE_INITFINI_ARRAY

        extern void __libc_init_array(void);
        extern void __libc_fini_array(void);
        atexit(__libc_fini_array);
        __libc_init_array();
    #endif
}

/**
 * \brief zeroes the .bss section
 */
static void init_bss(void)
{
    // External values set by the linker
    extern uint8_t _sbss;       ///< .bss section start
    extern uint8_t _ebss;       ///< .bss section end

    /**
     * Use memset because it's fast
     *
     * \warning memset MUST not use .bss nor .data
     */
    memset(&_sbss, 0x0, &_ebss - &_sbss);
}

/**
 * \brief Initialize (copy from flash) the .data section
 */
static void init_data(void)
{
    // External values set by the linker
    extern uint8_t _sidata; ///< .data section start in flash
    extern uint8_t _sdata;  ///< .data section start in RAM
    extern uint8_t _edata;  ///< .data section end in RAM

    /**
     * Use memcpy because it's fast
     *
     * \warning memcpy MUST not use.data
     */
    memcpy(&_sdata, &_sidata, &_edata - &_sdata);
}

/**
 * Start the RTC at 2000-01-01 00:00:00 when RTC is not running
 */
static void fix_rtc(void)
{
    time_t t = time(NULL);

    if (t == 949363200) // RTC default date
    {
        struct timeval tv =
        {
            .tv_sec     = 946684800,
            .tv_usec    = 0,
        };

        settimeofday(&tv, NULL);
    }
}

/**
 * \brief Workaround DFU problem
 *
 * The DFU USB bootloader disables the CCMDATARAMEN bit. This prevent booting
 * from it, because we use the CCMRAM for the stack.
 *
 * This workaround restores the reset state of the AHB1ENR register
 */
static void workaround_dfu_loader(void)
{
    RCC->AHB1ENR = RCC_AHB1Periph_CCMDATARAMEN;
}

#if USE_GCC_STACK_PROTECTOR
uint32_t __stack_chk_guard;
#endif

/**
 * \brief Program start (at reset)
 * \see linker script ENTRY(Reset_Handler)
 */
__attribute__ ((noreturn))
void Reset_Handler(void)
{
    /**
     * Here is the reset entry point, at this time, the only thing that is
     * initialized is the stack.
     */
    status_e status;                            ///< heivs library status

    extern int main(int argc, char *argv[]);    ///< Definition of main
    char main_str[] = {"main"};                 ///< argv[0]
    char *argv[] =                              ///< argv[]
    {
        main_str,
    };

    // Initialize the stack guard before calling any function
    #if USE_GCC_STACK_PROTECTOR
        __stack_chk_guard = 0xdeadBeef;
    #endif /* USE_GCC_STACK_PROTECTOR */

    // Workaround DFU problem
    workaround_dfu_loader();

    // Initialize clock as early/fast as possible, this will improve boot time
    ClockInit();

    // Initialize .bss and .data sections
    init_bss();
    init_data();

    // Save the reset reason for later use
    bsp_reset_reason_init();

    //
    // From now on standard C functions can be used (excluding stdios)
    //

    // Update clock values, done here because now we've got .bss and .data
    SystemCoreClockUpdate();

    // Interrupts initialization
    interrupts_init();

    // CCM RAM initialization
    init_ccm_ram();

    // Board initialization
    status = bsp_init();
    if (status != NO_ERROR)
    {
        /**
         * Most likely a hardware failure, nothing more to do
         */
        bsp_fatal(status);
    }

    //
    // All RAM is initialized, and stdio functions are ready to use.
    //

    // C++ runtime initialization
    libc_init_array();

    // Make sure the RTC is running
    fix_rtc();

    //
    // C++ is ready
    //

    #if USE_FREERTOS && configUSE_TRACE_FACILITY
    {
        char time_string[26];
        const uint32_t rcc_csr = bsp_reset_reason_get();
        traceLabel label;
        time_t now;
        struct tm tm;
        time(&now);

        // Tracing initialization
        vTraceInitTraceData();
        if (!uiTraceStart())
        {
            bsp_fatal(ERROR_TRACE_FAILED);
        }

        label = xTraceOpenLabel("Reset");

        // Log reset time
        gmtime_r(&now, &tm);
        asctime_r(&tm, time_string);
        vTracePrintF(label, "Reset GMT time : %s", time_string);

        // Save the reset reason into the trace
        if (rcc_csr == 0x0e000000)
        {
            vTracePrintF(label, "RCC->CSR =0x%08x (First reset after power on)", rcc_csr);
        }
        else if (rcc_csr == 0x04000000)
        {
            vTracePrintF(label, "RCC->CSR =0x%08x (Reset by reset pin)", rcc_csr);
        }
        else
        {
            vTracePrintF(label, "RCC->CSR =0x%08x (%s%s%s%s%s%s%s)",
                rcc_csr,
                rcc_csr & RCC_CSR_LPWRRSTF  ? "LPWRRSTF "   : " ",
                rcc_csr & RCC_CSR_WWDGRSTF  ? "WWDGRSTF "   : " ",
                rcc_csr & RCC_CSR_WDGRSTF   ? "WDGRSTF "    : " ",
                rcc_csr & RCC_CSR_SFTRSTF   ? "SFTRSTF "    : " ",
                rcc_csr & RCC_CSR_PORRSTF   ? "PORRSTF "    : " ",
                rcc_csr & RCC_CSR_PADRSTF   ? "PADRSTF "    : " ",
                rcc_csr & RCC_CSR_BORRSTF   ? "BORRSTF "    : " "
            );
        }

        bsp_reset_reason_clear();

        /**
         * Workaround interrupt disabled by trace code
         *
         * We want the interrupts in the same state when tracing is enable and
         * disable.
         */
        portENABLE_INTERRUPTS();
    }
    #endif /* USE_FREERTOS */

    // Call main with it's parameters
    exit(main(ARRAY_SIZE(argv), argv));
}

/************************************************************************//**
 * @}
 ***************************************************************************/

/**
 * Cortex-M4 vector table definition
 */
struct vector_table_t
{
    // Mandatory vectors
    void *stack_start;
    void (*reset)(void);
    void (*NMI)(void);
    void (*HardFault)(void);
    void (*MemManage)(void);
    void (*BusFault)(void);
    void (*UsageFault)(void);
    uint32_t _reserved_1[4];
    void (*SVC)(void);
    void (*DebugMon)(void);
    uint32_t _reserved_2[1];
    void (*PendSV)(void);
    void (*SysTick_)(void);

    // STM32f4x7 interrupts
    void (*WWDG_IRQ)(void);
    void (*PVD_IRQ)(void);
    void (*TAMP_STAMP_IRQ)(void);
    void (*RTC_WKUP_IRQ)(void);
    void (*FLASH_IRQ)(void);
    void (*RCC_IRQ)(void);
    void (*EXTI0_IRQ)(void);
    void (*EXTI1_IRQ)(void);
    void (*EXTI2_IRQ)(void);
    void (*EXTI3_IRQ)(void);
    void (*EXTI4_IRQ)(void);
    void (*DMA1_Stream0_IRQ)(void);
    void (*DMA1_Stream1_IRQ)(void);
    void (*DMA1_Stream2_IRQ)(void);
    void (*DMA1_Stream3_IRQ)(void);
    void (*DMA1_Stream4_IRQ)(void);
    void (*DMA1_Stream5_IRQ)(void);
    void (*DMA1_Stream6_IRQ)(void);
    void (*ADC_IRQ)(void);
    void (*CAN1_TX_IRQ)(void);
    void (*CAN1_RX0_IRQ)(void);
    void (*CAN1_RX1_IRQ)(void);
    void (*CAN1_SCE_IRQ)(void);
    void (*EXTI9_5_IRQ)(void);
    void (*TIM1_BRK_TIM9_IRQ)(void);
    void (*TIM1_UP_TIM10_IRQ)(void);
    void (*TIM1_TRG_COM_TIM11_IRQ)(void);
    void (*TIM1_CC_IRQ)(void);
    void (*TIM2_IRQ)(void);
    void (*TIM3_IRQ)(void);
    void (*TIM4_IRQ)(void);
    void (*I2C1_EV_IRQ)(void);
    void (*I2C1_ER_IRQ)(void);
    void (*I2C2_EV_IRQ)(void);
    void (*I2C2_ER_IRQ)(void);
    void (*SPI1_IRQ)(void);
    void (*SPI2_IRQ)(void);
    void (*USART1_IRQ)(void);
    void (*USART2_IRQ)(void);
    void (*USART3_IRQ)(void);
    void (*EXTI15_10_IRQ)(void);
    void (*RTC_Alarm_IRQ)(void);
    void (*OTG_FS_WKUP_IRQ)(void);
    void (*TIM8_BRK_TIM12_IRQ)(void);
    void (*TIM8_UP_TIM13_IRQ)(void);
    void (*TIM8_TRG_COM_TIM14_IRQ)(void);
    void (*TIM8_CC_IRQ)(void);
    void (*DMA1_Stream7_IRQ)(void);
    void (*FSMC_IRQ)(void);
    void (*SDIO_IRQ)(void);
    void (*TIM5_IRQ)(void);
    void (*SPI3_IRQ)(void);
    void (*UART4_IRQ)(void);
    void (*UART5_IRQ)(void);
    void (*TIM6_DAC_IRQ)(void);
    void (*TIM7_IRQ)(void);
    void (*DMA2_Stream0_IRQ)(void);
    void (*DMA2_Stream1_IRQ)(void);
    void (*DMA2_Stream2_IRQ)(void);
    void (*DMA2_Stream3_IRQ)(void);
    void (*DMA2_Stream4_IRQ)(void);
    void (*ETH_IRQ)(void);
    void (*ETH_WKUP_IRQ)(void);
    void (*CAN2_TX_IRQ)(void);
    void (*CAN2_RX0_IRQ)(void);
    void (*CAN2_RX1_IRQ)(void);
    void (*CAN2_SCE_IRQ)(void);
    void (*OTG_FS_IRQ)(void);
    void (*DMA2_Stream5_IRQ)(void);
    void (*DMA2_Stream6_IRQ)(void);
    void (*DMA2_Stream7_IRQ)(void);
    void (*USART6_IRQ)(void);
    void (*I2C3_EV_IRQ)(void);
    void (*I2C3_ER_IRQ)(void);
    void (*OTG_HS_EP1_OUT_IRQ)(void);
    void (*OTG_HS_EP1_IN_IRQ)(void);
    void (*OTG_HS_WKUP_IRQ)(void);
    void (*OTG_HS_IRQ)(void);
    void (*DCMI_IRQ)(void);
    void (*CRYP_IRQ)(void);
    void (*HASH_RNG_IRQ)(void);
    void (*FPU_IRQ)(void);
};


__attribute__ ((weak)) void NMI_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};

struct hardfault_regs_t
{
    uint32_t r0;
    uint32_t r1;
    uint32_t r2;
    uint32_t r3;
    uint32_t r12;
    uint32_t lr;
    uint32_t pc;
    uint32_t psr;
};

/**
 * Default *weak* handlers for all interrupts and exceptions.
 *
 * Real handlers will be set by NVIC_Init()
 */

void HardFaultHelper(volatile struct hardfault_regs_t *regs_when_hardfault)
{
    /**
     *           _.-^^---....,,--
     *       _--                  --_
     *      <                        >)
     *      |        HardFault !     |
     *       \._                   _./
     *          ```--. . , ; .--'''
     *                | |   |
     *             .-=||  | |=-.
     *             `-=#$%&%$#=-'
     *                | ;  :|
     *       _____.,-#%&$@%#&#~,._____
     *
     *  Something very wrong happened, and unfortunately, your MCU has no MMU
     *  (Memory Management Unit). So here it goes, your MCU has crashed
     *  and you're stuck in the HardFault handler.
     *
     *  Now you can read the full ARM documentation or try to watch the
     *  "regs_when_hardfault" parameter in your favorite debugger. This is a
     *  copy of the MCU registers when it failed, the most interesting part is
     *  regs_when_hardfault->lr. It shows where the PC (Program Counter) was
     *  when the fault appended (more or less).
     *
     *  Copy the value of the LR into the assembly view and you should see where
     *  it is in the code.
     *  Another way is to copy it into the PC of the processor do a single step.
     *
     *  Remember that depending on the type of fault the LR can be some
     *  instructions further that the instructions because of the pipeline.
     *
     *  Now you can see where the program was when it has crashed, and you can
     *  start the analysis.
     *
     *  Most likely causes:
     *  * dereferencing of a null pointer (malloc failed?)
     *  * most recent change(s)
     *  * stack overflow
     *  * ...
     */
    (void)regs_when_hardfault;
    if (debugger_is_connected())
    {
        breakpoint();
    }

    bsp_fatal(ERROR_BAD_STATE);
}

__attribute__ ((weak, naked)) void HardFault_Handler(void)
{
    asm volatile
    (
        "   tst     lr, #4                                  \n"
        "   ite     eq                                      \n"
        "   mrseq   r0, msp                                 \n"
        "   mrsne   r0, psp                                 \n"
        "   ldr     r1, [r0, #24]                           \n"
        "   ldr     r2, HardFaultHelper_addr                \n"
        "   bx      r2                                      \n"
        "                                                   \n"
        "HardFaultHelper_addr: .word HardFaultHelper        \n"
    );
};
__attribute__ ((weak)) void MemManage_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void BusFault_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void UsageFault_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void SVC_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void DebugMon_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void PendSV_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void SysTick_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void WWDG_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void PVD_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void TAMP_STAMP_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void RTC_WKUP_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void FLASH_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void RCC_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void EXTI0_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void EXTI1_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void EXTI2_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void EXTI3_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void EXTI4_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void DMA1_Stream0_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void DMA1_Stream1_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void DMA1_Stream2_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void DMA1_Stream3_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void DMA1_Stream4_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void DMA1_Stream5_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void DMA1_Stream6_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void ADC_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void CAN1_TX_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void CAN1_RX0_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void CAN1_RX1_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void CAN1_SCE_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void EXTI9_5_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void TIM1_BRK_TIM9_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void TIM1_UP_TIM10_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void TIM1_TRG_COM_TIM11_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void TIM1_CC_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void TIM2_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void TIM3_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void TIM4_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void I2C1_EV_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void I2C1_ER_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void I2C2_EV_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void I2C2_ER_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void SPI1_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void SPI2_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void USART1_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void USART2_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void USART3_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void EXTI15_10_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void RTC_Alarm_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void OTG_FS_WKUP_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void TIM8_BRK_TIM12_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void TIM8_UP_TIM13_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void TIM8_TRG_COM_TIM14_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void TIM8_CC_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void DMA1_Stream7_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void FSMC_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void SDIO_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void TIM5_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void SPI3_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void UART4_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void UART5_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void TIM6_DAC_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void TIM7_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void DMA2_Stream0_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void DMA2_Stream1_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void DMA2_Stream2_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void DMA2_Stream3_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void DMA2_Stream4_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void ETH_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void ETH_WKUP_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void CAN2_TX_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void CAN2_RX0_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void CAN2_RX1_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void CAN2_SCE_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void OTG_FS_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void DMA2_Stream5_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void DMA2_Stream6_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void DMA2_Stream7_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void USART6_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void I2C3_EV_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void I2C3_ER_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void OTG_HS_EP1_OUT_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void OTG_HS_EP1_IN_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void OTG_HS_WKUP_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void OTG_HS_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void DCMI_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void CRYP_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void HASH_RNG_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};
__attribute__ ((weak)) void FPU_IRQ_Handler(void){if (debugger_is_connected()) breakpoint(); bsp_fatal(ERROR_IRQ_NOT_HANDLED);};

extern uint32_t _stack_start; ///< Stack base, set by the linker script

/**
 * \brief The vector table, placed in the .isr_vector section
 *
 * This table will be placed by the linker at the beginning of the flash, which
 * is mapped to address 0x00000000 when the boot0 pin is at zero.
 */
const struct vector_table_t gVectors __attribute__ (( section(".isr_vector"))) =
{
    .stack_start            = &_stack_start,
    .reset                  = Reset_Handler,
    .NMI                    = NMI_Handler,
    .HardFault              = HardFault_Handler,
    .MemManage              = MemManage_Handler,
    .BusFault               = BusFault_Handler,
    .UsageFault             = UsageFault_Handler,
    ._reserved_1            = {0},
    .SVC                    = SVC_Handler,
    .DebugMon               = DebugMon_Handler,
    ._reserved_2            = {0},
    .PendSV                 = PendSV_Handler,
    .SysTick_               = SysTick_Handler,

    /* External Interrupts */
    .WWDG_IRQ               = WWDG_IRQ_Handler,
    .PVD_IRQ                = PVD_IRQ_Handler,
    .TAMP_STAMP_IRQ         = TAMP_STAMP_IRQ_Handler,
    .RTC_WKUP_IRQ           = RTC_WKUP_IRQ_Handler,
    .FLASH_IRQ              = FLASH_IRQ_Handler,
    .RCC_IRQ                = RCC_IRQ_Handler,
    .EXTI0_IRQ              = EXTI0_IRQ_Handler,
    .EXTI1_IRQ              = EXTI1_IRQ_Handler,
    .EXTI2_IRQ              = EXTI2_IRQ_Handler,
    .EXTI3_IRQ              = EXTI3_IRQ_Handler,
    .EXTI4_IRQ              = EXTI4_IRQ_Handler,
    .DMA1_Stream0_IRQ       = DMA1_Stream0_IRQ_Handler,
    .DMA1_Stream1_IRQ       = DMA1_Stream1_IRQ_Handler,
    .DMA1_Stream2_IRQ       = DMA1_Stream2_IRQ_Handler,
    .DMA1_Stream3_IRQ       = DMA1_Stream3_IRQ_Handler,
    .DMA1_Stream4_IRQ       = DMA1_Stream4_IRQ_Handler,
    .DMA1_Stream5_IRQ       = DMA1_Stream5_IRQ_Handler,
    .DMA1_Stream6_IRQ       = DMA1_Stream6_IRQ_Handler,
    .ADC_IRQ                = ADC_IRQ_Handler,
    .CAN1_TX_IRQ            = CAN1_TX_IRQ_Handler,
    .CAN1_RX0_IRQ           = CAN1_RX0_IRQ_Handler,
    .CAN1_RX1_IRQ           = CAN1_RX1_IRQ_Handler,
    .CAN1_SCE_IRQ           = CAN1_SCE_IRQ_Handler,
    .EXTI9_5_IRQ            = EXTI9_5_IRQ_Handler,
    .TIM1_BRK_TIM9_IRQ      = TIM1_BRK_TIM9_IRQ_Handler,
    .TIM1_UP_TIM10_IRQ      = TIM1_UP_TIM10_IRQ_Handler,
    .TIM1_TRG_COM_TIM11_IRQ = TIM1_TRG_COM_TIM11_IRQ_Handler,
    .TIM1_CC_IRQ            = TIM1_CC_IRQ_Handler,
    .TIM2_IRQ               = TIM2_IRQ_Handler,
    .TIM3_IRQ               = TIM3_IRQ_Handler,
    .TIM4_IRQ               = TIM4_IRQ_Handler,
    .I2C1_EV_IRQ            = I2C1_EV_IRQ_Handler,
    .I2C1_ER_IRQ            = I2C1_ER_IRQ_Handler,
    .I2C2_EV_IRQ            = I2C2_EV_IRQ_Handler,
    .I2C2_ER_IRQ            = I2C2_ER_IRQ_Handler,
    .SPI1_IRQ               = SPI1_IRQ_Handler,
    .SPI2_IRQ               = SPI2_IRQ_Handler,
    .USART1_IRQ             = USART1_IRQ_Handler,
    .USART2_IRQ             = USART2_IRQ_Handler,
    .USART3_IRQ             = USART3_IRQ_Handler,
    .EXTI15_10_IRQ          = EXTI15_10_IRQ_Handler,
    .RTC_Alarm_IRQ          = RTC_Alarm_IRQ_Handler,
    .OTG_FS_WKUP_IRQ        = OTG_FS_WKUP_IRQ_Handler,
    .TIM8_BRK_TIM12_IRQ     = TIM8_BRK_TIM12_IRQ_Handler,
    .TIM8_UP_TIM13_IRQ      = TIM8_UP_TIM13_IRQ_Handler,
    .TIM8_TRG_COM_TIM14_IRQ = TIM8_TRG_COM_TIM14_IRQ_Handler,
    .TIM8_CC_IRQ            = TIM8_CC_IRQ_Handler,
    .DMA1_Stream7_IRQ       = DMA1_Stream7_IRQ_Handler,
    .FSMC_IRQ               = FSMC_IRQ_Handler,
    .SDIO_IRQ               = SDIO_IRQ_Handler,
    .TIM5_IRQ               = TIM5_IRQ_Handler,
    .SPI3_IRQ               = SPI3_IRQ_Handler,
    .UART4_IRQ              = UART4_IRQ_Handler,
    .UART5_IRQ              = UART5_IRQ_Handler,
    .TIM6_DAC_IRQ           = TIM6_DAC_IRQ_Handler,
    .TIM7_IRQ               = TIM7_IRQ_Handler,
    .DMA2_Stream0_IRQ       = DMA2_Stream0_IRQ_Handler,
    .DMA2_Stream1_IRQ       = DMA2_Stream1_IRQ_Handler,
    .DMA2_Stream2_IRQ       = DMA2_Stream2_IRQ_Handler,
    .DMA2_Stream3_IRQ       = DMA2_Stream3_IRQ_Handler,
    .DMA2_Stream4_IRQ       = DMA2_Stream4_IRQ_Handler,
    .ETH_IRQ                = ETH_IRQ_Handler,
    .ETH_WKUP_IRQ           = ETH_WKUP_IRQ_Handler,
    .CAN2_TX_IRQ            = CAN2_TX_IRQ_Handler,
    .CAN2_RX0_IRQ           = CAN2_RX0_IRQ_Handler,
    .CAN2_RX1_IRQ           = CAN2_RX1_IRQ_Handler,
    .CAN2_SCE_IRQ           = CAN2_SCE_IRQ_Handler,
    .OTG_FS_IRQ             = OTG_FS_IRQ_Handler,
    .DMA2_Stream5_IRQ       = DMA2_Stream5_IRQ_Handler,
    .DMA2_Stream6_IRQ       = DMA2_Stream6_IRQ_Handler,
    .DMA2_Stream7_IRQ       = DMA2_Stream7_IRQ_Handler,
    .USART6_IRQ             = USART6_IRQ_Handler,
    .I2C3_EV_IRQ            = I2C3_EV_IRQ_Handler,
    .I2C3_ER_IRQ            = I2C3_ER_IRQ_Handler,
    .OTG_HS_EP1_OUT_IRQ     = OTG_HS_EP1_OUT_IRQ_Handler,
    .OTG_HS_EP1_IN_IRQ      = OTG_HS_EP1_IN_IRQ_Handler,
    .OTG_HS_WKUP_IRQ        = OTG_HS_WKUP_IRQ_Handler,
    .OTG_HS_IRQ             = OTG_HS_IRQ_Handler,
    .DCMI_IRQ               = DCMI_IRQ_Handler,
    .CRYP_IRQ               = CRYP_IRQ_Handler,
    .HASH_RNG_IRQ           = HASH_RNG_IRQ_Handler,
    .FPU_IRQ                = FPU_IRQ_Handler,
};