29 #ifndef __CLK_SYNTHESIZER_CS2200_H
30 #define __CLK_SYNTHESIZER_CS2200_H
58 #define DEFAULT_INJECTED_ERROR 0
60 #define USE_I2C_DMA_TC_IT
63 #define EXTCLK_DIR_UP 0
64 #define EXTCLK_DIR_DOWN 1
67 #define CS_DEVICE_ID 0x01
68 #define CS_DEVICE_CTRL 0x02
69 #define CS_DEVICE_CFG1 0x03
70 #define CS_GLOBAL_CFG 0x05
71 #define CS_RATIO_3 0x06
72 #define CS_RATIO_2 0x07
73 #define CS_RATIO_1 0x08
74 #define CS_RATIO_0 0x09
75 #define CS_FUNCT_CFG1 0x16
76 #define CS_FUNCT_CFG2 0x17
79 #define CLK_SYNTH_ADDRESS 0x9C
82 #define CLK_SYNTH_I2C I2C1
83 #define CLK_SYNTH_I2C_CLK RCC_APB1Periph_I2C1
84 #define CLK_SYNTH_I2C_GPIO_CLOCK RCC_AHB1Periph_GPIOB
85 #define CLK_SYNTH_I2C_GPIO_AF GPIO_AF_I2C1
86 #define CLK_SYNTH_I2C_GPIO GPIOB
87 #define CLK_SYNTH_I2C_SCL_PIN GPIO_Pin_6
88 #define CLK_SYNTH_I2C_SDA_PIN GPIO_Pin_9
89 #define CLK_SYNTH_I2C_SCL_PINSRC GPIO_PinSource6
90 #define CLK_SYNTH_I2C_SDA_PINSRC GPIO_PinSource9
92 #define CLK_SYNTH_I2C_DMA DMA1
93 #define CLK_SYNTH_I2C_DMA_CHANNEL DMA_Channel_1
94 #define CLK_SYNTH_I2C_DR_ADDRESS ((uint32_t)0x40005410)
95 #define CLK_SYNTH_I2C_DMA_STREAM_TX DMA1_Stream6
96 #define CLK_SYNTH_I2C_DMA_STREAM_RX DMA1_Stream0
97 #define CLK_SYNTH_I2C_TX_DMA_TCFLAG DMA_FLAG_TCIF6
98 #define CLK_SYNTH_I2C_TX_DMA_FEIFLAG DMA_FLAG_FEIF6
99 #define CLK_SYNTH_I2C_TX_DMA_DMEIFLAG DMA_FLAG_DMEIF6
100 #define CLK_SYNTH_I2C_TX_DMA_TEIFLAG DMA_FLAG_TEIF6
101 #define CLK_SYNTH_I2C_TX_DMA_HTIFLAG DMA_FLAG_HTIF6
102 #define CLK_SYNTH_I2C_RX_DMA_TCFLAG DMA_FLAG_TCIF0
103 #define CLK_SYNTH_I2C_RX_DMA_FEIFLAG DMA_FLAG_FEIF0
104 #define CLK_SYNTH_I2C_RX_DMA_DMEIFLAG DMA_FLAG_DMEIF0
105 #define CLK_SYNTH_I2C_RX_DMA_TEIFLAG DMA_FLAG_TEIF0
106 #define CLK_SYNTH_I2C_RX_DMA_HTIFLAG DMA_FLAG_HTIF0
107 #define DMAx_CLK RCC_AHB1Periph_DMA1
108 #define CLK_SYNTH_I2C_DMA_TX_IRQn DMA1_Stream6_IRQn
109 #define CLK_SYNTH_I2C_DMA_TX_IRQ_Handler DMA1_Stream6_IRQ_Handler
111 #define CLK_SYNTH_I2C_MAX_SIZE 5
116 #define STM32_CLK_SYNTH_PRE_PRIO 3
117 #define STM32_CLK_SYNTH_SUB_PRIO 3
124 #define CLK_SYNTH_FLAG_TIMEOUT ((uint32_t)0x1000)
125 #define CLK_SYNTH_LONG_TIMEOUT ((uint32_t)(300 * CLK_SYNTH_FLAG_TIMEOUT))
132 #define STATE_NOTINITED 0
133 #define STATE_INITED 1
137 #define I2S_EXT_REF_CLK 40000000
144 #define I2C_SPEED 100000
147 #if (I2C_SPEED > 100000)
148 #error "Error: Clock Synthesizer CS2200 does not support I2C freq higher than 100KHz !"
179 uint32_t CLK_SYNTH_Init (uint32_t OutFreq, uint32_t InFreq, uint32_t InitCtrlPort, uint32_t Opt);
180 uint32_t CLK_SYNTH_DeInit (
void);
181 uint32_t CLK_SYNTH_AdjustPpm (int32_t Ppm);
182 uint32_t CLK_SYNTH_UpdateFreq (uint32_t Freq, uint32_t opt1, uint32_t opt2, uint32_t opt3);
189 uint32_t CLK_SYNTH_TIMEOUT_UserCallback(
void);
CMSIS Cortex-M4 Device Peripheral Access Layer Header File. This file contains all the peripheral reg...