ARMEBS4  revision-26.06.2015
stm322xg_clk_synthesizer_cs2200.h
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1 /**
2  ******************************************************************************
3  * @file stm322xg_clk_synthesizer_cs2200.h
4  * @author MCD Application Team
5  * @version V1.0.0
6  * @date 31-July-2012
7  * @brief This file contains all the functions prototypes for the external
8  * clock synthesizer controller.
9  ******************************************************************************
10  * @attention
11  *
12  * <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
13  *
14  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15  * You may not use this file except in compliance with the License.
16  * You may obtain a copy of the License at:
17  *
18  * http://www.st.com/software_license_agreement_liberty_v2
19  *
20  * Unless required by applicable law or agreed to in writing, software
21  * distributed under the License is distributed on an "AS IS" BASIS,
22  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23  * See the License for the specific language governing permissions and
24  * limitations under the License.
25  *
26  ******************************************************************************
27  */
28 
29 #ifndef __CLK_SYNTHESIZER_CS2200_H
30 #define __CLK_SYNTHESIZER_CS2200_H
31 
32 /* Includes ------------------------------------------------------------------*/
33 #include "stm32/stm32f4xx.h"
34 
35 /** @addtogroup STM32_Audio_Utilities
36  * @{
37  */
38 
39 /** @defgroup STM32_AUDIO_PLAYER
40  * @brief This file is the header file for the stm32 audio player module
41  * @{
42  */
43 
44 
45 /** @defgroup STM32_AUDIO_PLAYER_Exported_Defines
46  * @{
47  */
48 /* Use this define to inject an error on the reference clock output to see how
49  synchronization mechanims adjust its value accordingly.
50  To remove injected error set this define to 0.
51  Maximum allowed error is 500ppm ==> 0x284.
52  NOTE: don't forget that even when this parameter is set to 0, there shall be
53  an intrinsic error on the output frequency of the clock synthesize due to:
54  - Reference clock accuracy (in this case the MCO is used as reference clock).
55  - Prescalers calculation floating inaccuracy (in ratio caculation).
56  - Variations due to temperature.
57  - Intrinsic clock error on the host clock. */
58 #define DEFAULT_INJECTED_ERROR 0 /* 0x284 */
59 
60 #define USE_I2C_DMA_TC_IT
61 
62 /* Direction of the frequency update */
63 #define EXTCLK_DIR_UP 0
64 #define EXTCLK_DIR_DOWN 1
65 
66 /* Registers mapping description */
67 #define CS_DEVICE_ID 0x01
68 #define CS_DEVICE_CTRL 0x02
69 #define CS_DEVICE_CFG1 0x03
70 #define CS_GLOBAL_CFG 0x05
71 #define CS_RATIO_3 0x06 /* MSB byte of Ratio */
72 #define CS_RATIO_2 0x07 /* MSB - 1 byte of Ratio */
73 #define CS_RATIO_1 0x08 /* MSB - 2 byte of Ratio */
74 #define CS_RATIO_0 0x09 /* LSB byte of Ratio */
75 #define CS_FUNCT_CFG1 0x16
76 #define CS_FUNCT_CFG2 0x17
77 
78 /* Chip address 0x9C (when AD0 pin is connected to Gnd) */
79 #define CLK_SYNTH_ADDRESS 0x9C
80 
81 /* I2C peripheral configuration defines (control interface) */
82 #define CLK_SYNTH_I2C I2C1
83 #define CLK_SYNTH_I2C_CLK RCC_APB1Periph_I2C1
84 #define CLK_SYNTH_I2C_GPIO_CLOCK RCC_AHB1Periph_GPIOB
85 #define CLK_SYNTH_I2C_GPIO_AF GPIO_AF_I2C1
86 #define CLK_SYNTH_I2C_GPIO GPIOB
87 #define CLK_SYNTH_I2C_SCL_PIN GPIO_Pin_6
88 #define CLK_SYNTH_I2C_SDA_PIN GPIO_Pin_9
89 #define CLK_SYNTH_I2C_SCL_PINSRC GPIO_PinSource6
90 #define CLK_SYNTH_I2C_SDA_PINSRC GPIO_PinSource9
91 
92 #define CLK_SYNTH_I2C_DMA DMA1
93 #define CLK_SYNTH_I2C_DMA_CHANNEL DMA_Channel_1
94 #define CLK_SYNTH_I2C_DR_ADDRESS ((uint32_t)0x40005410)
95 #define CLK_SYNTH_I2C_DMA_STREAM_TX DMA1_Stream6
96 #define CLK_SYNTH_I2C_DMA_STREAM_RX DMA1_Stream0
97 #define CLK_SYNTH_I2C_TX_DMA_TCFLAG DMA_FLAG_TCIF6
98 #define CLK_SYNTH_I2C_TX_DMA_FEIFLAG DMA_FLAG_FEIF6
99 #define CLK_SYNTH_I2C_TX_DMA_DMEIFLAG DMA_FLAG_DMEIF6
100 #define CLK_SYNTH_I2C_TX_DMA_TEIFLAG DMA_FLAG_TEIF6
101 #define CLK_SYNTH_I2C_TX_DMA_HTIFLAG DMA_FLAG_HTIF6
102 #define CLK_SYNTH_I2C_RX_DMA_TCFLAG DMA_FLAG_TCIF0
103 #define CLK_SYNTH_I2C_RX_DMA_FEIFLAG DMA_FLAG_FEIF0
104 #define CLK_SYNTH_I2C_RX_DMA_DMEIFLAG DMA_FLAG_DMEIF0
105 #define CLK_SYNTH_I2C_RX_DMA_TEIFLAG DMA_FLAG_TEIF0
106 #define CLK_SYNTH_I2C_RX_DMA_HTIFLAG DMA_FLAG_HTIF0
107 #define DMAx_CLK RCC_AHB1Periph_DMA1
108 #define CLK_SYNTH_I2C_DMA_TX_IRQn DMA1_Stream6_IRQn
109 #define CLK_SYNTH_I2C_DMA_TX_IRQ_Handler DMA1_Stream6_IRQ_Handler
110 
111 #define CLK_SYNTH_I2C_MAX_SIZE 5
112 
113 
114 /* Interrupt priority for the I2C communication with the CS2200 device
115  These defines may be set in a generic configuration file (ie. audio_app_conf.h)*/
116 #define STM32_CLK_SYNTH_PRE_PRIO 3
117 #define STM32_CLK_SYNTH_SUB_PRIO 3
118 
119 /* Maximum Timeout values for flags and events waiting loops. These timeouts are
120  not based on accurate values, they just guarantee that the application will
121  not remain stuck if the I2C communication is corrupted.
122  You may modify these timeout values depending on CPU frequency and application
123  conditions (interrupts routines ...). */
124 #define CLK_SYNTH_FLAG_TIMEOUT ((uint32_t)0x1000)
125 #define CLK_SYNTH_LONG_TIMEOUT ((uint32_t)(300 * CLK_SYNTH_FLAG_TIMEOUT))
126 
127 /* Uncomment this line to enable verifying data sent to codec after each write
128  operation */
129 /* #define VERIFY_WRITTENDATA */
130 
131 /* Current state defines */
132 #define STATE_NOTINITED 0
133 #define STATE_INITED 1
134 
135 /* This is the reference clock input for the external clock synthesizer
136  It should be generated from the STM32 MCO IO.*/
137 #define I2S_EXT_REF_CLK 40000000
138 
139 /* I2C clock speed configuration (in Hz)
140  WARNING:
141  Make sure that this define is not already declared in other files (ie.
142  stm322xg_eval.h file). It can be used in parallel by other modules. */
143 #ifndef I2C_SPEED
144  #define I2C_SPEED 100000
145 #endif /* I2C_SPEED */
146 
147 #if (I2C_SPEED > 100000)
148  #error "Error: Clock Synthesizer CS2200 does not support I2C freq higher than 100KHz !"
149 #endif
150 /**
151  * @}
152  */
153 
154 /** @defgroup STM32_AUDIO_PLAYER_Exported_TypesDefinitions
155  * @{
156  */
157 /**
158  * @}
159  */
160 
161 
162 /** @defgroup STM32_AUDIO_PLAYER_Exported_Macros
163  * @{
164  */
165 /**
166  * @}
167  */
168 
169 /** @defgroup STM32_AUDIO_PLAYER_Exported_Variables
170  * @{
171  */
172 /**
173  * @}
174  */
175 
176 /** @defgroup STM32_AUDIO_PLAYER_Exported_FunctionsPrototype
177  * @{
178  */
179 uint32_t CLK_SYNTH_Init (uint32_t OutFreq, uint32_t InFreq, uint32_t InitCtrlPort, uint32_t Opt);
180 uint32_t CLK_SYNTH_DeInit (void);
181 uint32_t CLK_SYNTH_AdjustPpm (int32_t Ppm);
182 uint32_t CLK_SYNTH_UpdateFreq (uint32_t Freq, uint32_t opt1, uint32_t opt2, uint32_t opt3);
183 
184 /* CLK_SYNTH_TIMEOUT_UserCallback() function is called whenever a timeout condition
185  occurs during communication (waiting on an event that doesn't occur, bus
186  errors, busy devices ...) on the Codec control interface (I2C).
187  Typically the user implementation of this callback should reset I2C peripheral
188  and re-initialize communication or in worst case reset all the application. */
189 uint32_t CLK_SYNTH_TIMEOUT_UserCallback(void);
190 /**
191  * @}
192  */
193 
194 /**
195  * @}
196  */
197 
198 /**
199  * @}
200  */
201 
202 #endif /* __CLK_SYNTHESIZER_CS2200_H */
203 
204 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
CMSIS Cortex-M4 Device Peripheral Access Layer Header File. This file contains all the peripheral reg...