23 #ifndef __STM32F4xx_DBGMCU_H
24 #define __STM32F4xx_DBGMCU_H
47 #define DBGMCU_SLEEP ((uint32_t)0x00000001)
48 #define DBGMCU_STOP ((uint32_t)0x00000002)
49 #define DBGMCU_STANDBY ((uint32_t)0x00000004)
50 #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFF8) == 0x00) && ((PERIPH) != 0x00))
52 #define DBGMCU_TIM2_STOP ((uint32_t)0x00000001)
53 #define DBGMCU_TIM3_STOP ((uint32_t)0x00000002)
54 #define DBGMCU_TIM4_STOP ((uint32_t)0x00000004)
55 #define DBGMCU_TIM5_STOP ((uint32_t)0x00000008)
56 #define DBGMCU_TIM6_STOP ((uint32_t)0x00000010)
57 #define DBGMCU_TIM7_STOP ((uint32_t)0x00000020)
58 #define DBGMCU_TIM12_STOP ((uint32_t)0x00000040)
59 #define DBGMCU_TIM13_STOP ((uint32_t)0x00000080)
60 #define DBGMCU_TIM14_STOP ((uint32_t)0x00000100)
61 #define DBGMCU_RTC_STOP ((uint32_t)0x00000400)
62 #define DBGMCU_WWDG_STOP ((uint32_t)0x00000800)
63 #define DBGMCU_IWDG_STOP ((uint32_t)0x00001000)
64 #define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00200000)
65 #define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00400000)
66 #define DBGMCU_I2C3_SMBUS_TIMEOUT ((uint32_t)0x00800000)
67 #define DBGMCU_CAN1_STOP ((uint32_t)0x02000000)
68 #define DBGMCU_CAN2_STOP ((uint32_t)0x04000000)
69 #define IS_DBGMCU_APB1PERIPH(PERIPH) ((((PERIPH) & 0xF91FE200) == 0x00) && ((PERIPH) != 0x00))
71 #define DBGMCU_TIM1_STOP ((uint32_t)0x00000001)
72 #define DBGMCU_TIM8_STOP ((uint32_t)0x00000002)
73 #define DBGMCU_TIM9_STOP ((uint32_t)0x00010000)
74 #define DBGMCU_TIM10_STOP ((uint32_t)0x00020000)
75 #define DBGMCU_TIM11_STOP ((uint32_t)0x00040000)
76 #define IS_DBGMCU_APB2PERIPH(PERIPH) ((((PERIPH) & 0xFFF8FFFC) == 0x00) && ((PERIPH) != 0x00))
83 uint32_t DBGMCU_GetREVID(
void);
84 uint32_t DBGMCU_GetDEVID(
void);
85 void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState);
86 void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
87 void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
CMSIS Cortex-M4 Device Peripheral Access Layer Header File. This file contains all the peripheral reg...