24 #ifndef __STM32F4xx_IWDG_H
25 #define __STM32F4xx_IWDG_H
52 #define IWDG_WriteAccess_Enable ((uint16_t)0x5555)
53 #define IWDG_WriteAccess_Disable ((uint16_t)0x0000)
54 #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
55 ((ACCESS) == IWDG_WriteAccess_Disable))
63 #define IWDG_Prescaler_4 ((uint8_t)0x00)
64 #define IWDG_Prescaler_8 ((uint8_t)0x01)
65 #define IWDG_Prescaler_16 ((uint8_t)0x02)
66 #define IWDG_Prescaler_32 ((uint8_t)0x03)
67 #define IWDG_Prescaler_64 ((uint8_t)0x04)
68 #define IWDG_Prescaler_128 ((uint8_t)0x05)
69 #define IWDG_Prescaler_256 ((uint8_t)0x06)
70 #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \
71 ((PRESCALER) == IWDG_Prescaler_8) || \
72 ((PRESCALER) == IWDG_Prescaler_16) || \
73 ((PRESCALER) == IWDG_Prescaler_32) || \
74 ((PRESCALER) == IWDG_Prescaler_64) || \
75 ((PRESCALER) == IWDG_Prescaler_128)|| \
76 ((PRESCALER) == IWDG_Prescaler_256))
84 #define IWDG_FLAG_PVU ((uint16_t)0x0001)
85 #define IWDG_FLAG_RVU ((uint16_t)0x0002)
86 #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU))
87 #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
100 void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess);
101 void IWDG_SetPrescaler(uint8_t IWDG_Prescaler);
102 void IWDG_SetReload(uint16_t Reload);
103 void IWDG_ReloadCounter(
void);
106 void IWDG_Enable(
void);
109 FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
CMSIS Cortex-M4 Device Peripheral Access Layer Header File. This file contains all the peripheral reg...