ARMEBS4  revision-26.06.2015
bsp_stm32_camera.c
1 #if defined (BOARD_STM32_CAMERA)
2 #include "heivs/bsp.h"
3 
4 #include "heivs/stm32_mcp4552.h"
5 #include "stm32/stm32f4xx_fsmc.h"
6 #include "stm32/stm32f4xx_rcc.h"
7 #include "heivs/ram_test.h"
8 #include "heivs/stm32_manageable_psu.h"
9 #include "heivs/time.h"
10 #include "heivs/retarget.h"
11 #include "heivs/lightness_to_pwm.h"
12 
13 static const struct gpio_t gpios[] =
14 {
15  GPIO_FSMC_A0_PF0,
16  GPIO_FSMC_A1_PF1,
17  GPIO_FSMC_A2_PF2,
18  GPIO_FSMC_A3_PF3,
19  GPIO_FSMC_A4_PF4,
20  GPIO_FSMC_A5_PF5,
21  GPIO_FSMC_A6_PF12,
22  GPIO_FSMC_A7_PF13,
23  GPIO_FSMC_A8_PF14,
24  GPIO_FSMC_A9_PF15,
25  GPIO_FSMC_A10_PG0,
26  GPIO_FSMC_A11_PG1,
27  GPIO_FSMC_A12_PG2,
28  GPIO_FSMC_A13_PG3,
29  GPIO_FSMC_A14_PG4,
30  GPIO_FSMC_A15_PG5,
31  GPIO_FSMC_A16_PD11,
32  GPIO_FSMC_A17_PD12,
33  GPIO_FSMC_A18_PD13,
34  GPIO_FSMC_A19_PE3,
35  GPIO_FSMC_A20_PE4,
36  GPIO_FSMC_A21_PE5,
37 
38  GPIO_FSMC_D0_PD14,
39  GPIO_FSMC_D1_PD15,
40  GPIO_FSMC_D2_PD0,
41  GPIO_FSMC_D3_PD1,
42  GPIO_FSMC_D4_PE7,
43  GPIO_FSMC_D5_PE8,
44  GPIO_FSMC_D6_PE9,
45  GPIO_FSMC_D7_PE10,
46  GPIO_FSMC_D8_PE11,
47  GPIO_FSMC_D9_PE12,
48  GPIO_FSMC_D10_PE13,
49  GPIO_FSMC_D11_PE14,
50  GPIO_FSMC_D12_PE15,
51  GPIO_FSMC_D13_PD8,
52  GPIO_FSMC_D14_PD9,
53  GPIO_FSMC_D15_PD10,
54 
55  GPIO_FSMC_NE1_FSMC_NCE2_PD7,
56  GPIO_FSMC_NWE_PD5,
57  GPIO_FSMC_NOE_PD4,
58  GPIO_FSMC_BLN1_PE1,
59  GPIO_FSMC_NBL0_PE0,
60 };
61 
62 static status_e bsp_init_extRAM(void)
63 {
64  /* Setup gpios used by our RAM*/
65  gpio_setup_list(gpios, ARRAY_SIZE(gpios));
66 
67  RCC_AHB3PeriphClockCmd(RCC_AHB3ENR_FSMCEN, ENABLE);
68 
69  FSMC_NORSRAMInitTypeDef fscm;
70  FSMC_NORSRAMTimingInitTypeDef timings;
71  timings.FSMC_AddressSetupTime = 5;
72  timings.FSMC_AddressHoldTime = 2;
73  timings.FSMC_DataSetupTime = 7;
74  timings.FSMC_BusTurnAroundDuration = 3;
75  timings.FSMC_CLKDivision = 0;
76  timings.FSMC_DataLatency = 2;
77  timings.FSMC_AccessMode = FSMC_AccessMode_A;
78 
79  fscm.FSMC_Bank = FSMC_Bank1_NORSRAM1;
80  fscm.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
81  fscm.FSMC_MemoryType = FSMC_MemoryType_PSRAM;
82  fscm.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
83  fscm.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
84  fscm.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
85  fscm.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
86  fscm.FSMC_WrapMode = FSMC_WrapMode_Disable;
87  fscm.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
88  fscm.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
89  fscm.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
90  fscm.FSMC_ExtendedMode = FSMC_ExtendedMode_Enable;
91  fscm.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
92  fscm.FSMC_ReadWriteTimingStruct = &timings;
93  fscm.FSMC_WriteTimingStruct = &timings;
94 
95  FSMC_NORSRAMInit(&fscm);
96 
97  FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);
98 
99  return NO_ERROR;
100 }
101 
102 static void load_init_external_ram(void)
103 {
104  extern uint8_t __ext_ram_bss_start;
105  extern uint8_t __ext_ram_bss_end;
106 
107  extern uint8_t __ext_ram_dst_start;
108  extern uint8_t __ext_ram_dst_end;
109  extern uint8_t __ext_ram_src_start;
110 
111  memset(&__ext_ram_bss_start, 0x0, &__ext_ram_bss_end - &__ext_ram_bss_start);
112  memcpy(&__ext_ram_dst_start,&__ext_ram_src_start, &__ext_ram_dst_end - & __ext_ram_dst_start);
113 }
114 
115 static void bsp_pwm_leds_init(uint32_t frequency, uint32_t steps, uint32_t initial)
116 {
117  const struct gpio_t pins[] =
118  {
119  GPIO_TIM2_CH1_PA0,
120  GPIO_TIM2_CH2_PA1,
121  GPIO_TIM2_CH3_PA2,
122  GPIO_TIM2_CH4_PA3,
123  };
124 
125  /* Pin setup */
126  gpio_setup_list(pins, ARRAY_SIZE(pins));
127 
128  /* Enable the timer clock */
129  RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
130 
131  /* Reset the timer */
132  RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, ENABLE);
133  RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, DISABLE);
134 
135  TIM2->CCER =
136  TIM_CCER_CC1E
137  | TIM_CCER_CC2E
138  | TIM_CCER_CC3E
139  | TIM_CCER_CC4E
140  ;
141 
142  /**
143  * Timer frequency = steps * input_frequency
144  */
145  TIM2->PSC = (((SystemClock.timer)/steps)/frequency) - 1;
146 
147  /**
148  * Count steps (from zero to steps - 1)
149  */
150  TIM2->ARR = steps - 1;
151 
152  /* Set the output value to 50 % */
153  TIM2->CCR1 = initial;
154  TIM2->CCR2 = initial;
155  TIM2->CCR3 = initial;
156  TIM2->CCR4 = initial;
157 
158  TIM2->CCMR1 =
159  TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1PE
160  | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2PE;
161  ;
162  TIM2->CCMR2 =
163  TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3PE
164  | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4PE
165  ;
166 
167  /* Update registers now */
168  TIM2->EGR |= TIM_EGR_UG;
169 
170  /* Start the timer */
171  TIM2->CR1 = TIM_CR1_ARPE | TIM_CR1_CEN;
172 }
173 
174 void bsp_led_set_pwm(uint32_t nr, uint32_t value)
175 {
176  if (nr < 4)
177  {
178  volatile uint32_t *addr[] =
179  {
180  &TIM2->CCR1,
181  &TIM2->CCR3,
182  &TIM2->CCR4,
183  &TIM2->CCR2,
184  };
185 
186  *addr[nr] = lightness_to_pwm(value);
187  }
188 }
189 
190 void bsp_led_set(uint32_t nr, uint32_t value)
191 {
192  bsp_led_set_pwm(nr, value > 0 ? LIGHTNESS_PWM_STEP : 0);
193 }
194 
195 void bsp_led_toggle(uint32_t nr)
196 {
197  if (nr < 4)
198  {
199  volatile uint32_t *addr[] =
200  {
201  &TIM2->CCR1,
202  &TIM2->CCR3,
203  &TIM2->CCR4,
204  &TIM2->CCR2,
205  };
206 
207  if (*addr[nr])
208  {
209  *addr[nr] = 0;
210  }
211  else
212  {
213  *addr[nr] = LIGHTNESS_PWM_STEP;
214  }
215  }
216 }
217 
218 static status_e bsp_light_init(uint32_t frequency, uint32_t steps, uint32_t initial)
219 {
220  const struct gpio_t pins[] =
221  {
222  GPIO_TIM10_CH1_PB8,
223  };
224 
225  /* Pin setup */
226  gpio_setup_list(pins, ARRAY_SIZE(pins));
227 
228  /* Enable the timer clock */
229  RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM10, ENABLE);
230 
231  /* Reset the timer */
232  RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM10, ENABLE);
233  RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM10, DISABLE);
234 
235  TIM10->CCER =
236  TIM_CCER_CC1E /* Enable compare 1 output */
237  ;
238 
239  /**
240  * Timer frequency = steps * input_frequency
241  */
242  TIM10->PSC = (((SystemClock.timer)/steps)/frequency) - 1;
243 
244  /**
245  * Count steps (from zero to steps - 1)
246  */
247  TIM10->ARR = steps - 1;
248 
249  /* Set the output value to 50 % */
250  TIM10->CCR1 = initial;
251 
252  TIM10->CCMR1 =
253  TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 /* PWM mode 1 */
254  | TIM_CCMR1_OC1PE /* CCR2 shadow mode */;
255 
256  /* Update registers now */
257  TIM10->EGR |= TIM_EGR_UG;
258 
259  /* Start the timer */
260  TIM10->CR1 =
261  TIM_CR1_ARPE
262  | TIM_CR1_CEN;
263 
264  return NO_ERROR;
265 }
266 
267 void bsp_light_set(uint32_t value)
268 {
269  TIM10->CCR1 = value;
270 }
271 
272 static const struct gpio_t bsp_buttons[BSP_BUTTON_NR] =
273 {
274  DEF_GPIOA( 7, GPIO_INPUT | GPIO_PULLUP | GPIO_SPEED_2),
275  DEF_GPIOB( 1, GPIO_INPUT | GPIO_PULLUP | GPIO_SPEED_2),
276 };
277 
278 static status_e bsp_buttons_init(void)
279 {
280  gpio_setup_list(bsp_buttons, ARRAY_SIZE(bsp_buttons));
281 
282  return NO_ERROR;
283 }
284 
285 uint32_t bsp_button_get(uint32_t nr)
286 {
287  if (nr >= BSP_BUTTON_NR)
288  {
289  return 0;
290  }
291 
292  return !gpio_get(&bsp_buttons[nr]);
293 }
294 
295 const struct gpio_t *bsp_button_gpios(void)
296 {
297  return &bsp_buttons[0];
298 }
299 
300 static const struct gpio_t all_pins_safe_values[] =
301 {
302  DEF_GPIOA( 0, GPIO_OUTPUT_0),
303  DEF_GPIOA( 1, GPIO_OUTPUT_0),
304  DEF_GPIOA( 2, GPIO_OUTPUT_0),
305  DEF_GPIOA( 3, GPIO_OUTPUT_0),
306  DEF_GPIOA( 4, GPIO_OUTPUT_0),
307  DEF_GPIOA( 5, GPIO_OUTPUT_0),
308  DEF_GPIOA( 6, GPIO_INPUT | GPIO_PULLUP),
309  DEF_GPIOA( 7, GPIO_INPUT | GPIO_PULLUP),
310  DEF_GPIOA( 8, GPIO_INPUT | GPIO_PULLDOWN),
311  DEF_GPIOA( 9, GPIO_INPUT | GPIO_PULLUP),
312  DEF_GPIOA(10, GPIO_INPUT | GPIO_PULLUP),
313  DEF_GPIOA(11, GPIO_INPUT | GPIO_PULLUP),
314  DEF_GPIOA(12, GPIO_INPUT | GPIO_PULLUP),
315  // JTAG
316  //DEF_GPIOA(13, GPIO_INPUT | GPIO_PULLDOWN),
317  //DEF_GPIOA(14, GPIO_INPUT | GPIO_PULLDOWN),
318  //DEF_GPIOA(15, GPIO_INPUT | GPIO_PULLDOWN),
319 
320  DEF_GPIOB( 0, GPIO_INPUT | GPIO_PULLUP),
321  DEF_GPIOB( 1, GPIO_INPUT | GPIO_PULLUP),
322  DEF_GPIOB( 2, GPIO_INPUT | GPIO_PULLUP),
323 
324  // JTAG
325  //DEF_GPIOB( 3, GPIO_INPUT | GPIO_PULLDOWN),
326  //DEF_GPIOB( 4, GPIO_INPUT | GPIO_PULLDOWN),
327 
328  DEF_GPIOB( 5, GPIO_INPUT | GPIO_PULLUP),
329  DEF_GPIOB( 6, GPIO_INPUT | GPIO_PULLUP),
330  DEF_GPIOB( 7, GPIO_INPUT | GPIO_PULLUP),
331  DEF_GPIOB( 8, GPIO_OUTPUT_0),
332  DEF_GPIOB( 9, GPIO_INPUT),
333  DEF_GPIOB(10, GPIO_INPUT | GPIO_PULLUP),
334  DEF_GPIOB(11, GPIO_INPUT | GPIO_PULLUP),
335  DEF_GPIOB(12, GPIO_INPUT | GPIO_PULLUP),
336  DEF_GPIOB(13, GPIO_INPUT | GPIO_PULLUP),
337  DEF_GPIOB(14, GPIO_INPUT | GPIO_PULLUP),
338  DEF_GPIOB(15, GPIO_INPUT | GPIO_PULLUP),
339 
340  DEF_GPIOC( 0, GPIO_INPUT | GPIO_PULLUP),
341  DEF_GPIOC( 1, GPIO_INPUT | GPIO_PULLUP),
342  DEF_GPIOC( 2, GPIO_INPUT | GPIO_PULLUP),
343  DEF_GPIOC( 3, GPIO_INPUT | GPIO_PULLUP),
344  DEF_GPIOC( 4, GPIO_INPUT | GPIO_PULLUP),
345  DEF_GPIOC( 5, GPIO_INPUT | GPIO_PULLUP),
346  DEF_GPIOC( 6, GPIO_INPUT | GPIO_PULLUP),
347  DEF_GPIOC( 7, GPIO_INPUT | GPIO_PULLUP),
348  DEF_GPIOC( 8, GPIO_INPUT | GPIO_PULLUP),
349  DEF_GPIOC( 9, GPIO_INPUT | GPIO_PULLUP),
350  DEF_GPIOC(10, GPIO_INPUT | GPIO_PULLUP),
351  DEF_GPIOC(11, GPIO_INPUT | GPIO_PULLUP),
352  DEF_GPIOC(12, GPIO_INPUT | GPIO_PULLUP),
353  DEF_GPIOC(13, GPIO_INPUT | GPIO_PULLUP),
354  DEF_GPIOC(14, GPIO_INPUT | GPIO_PULLUP),
355  DEF_GPIOC(15, GPIO_INPUT | GPIO_PULLUP),
356 
357  DEF_GPIOD( 0, GPIO_INPUT | GPIO_PULLUP),
358  DEF_GPIOD( 1, GPIO_INPUT | GPIO_PULLUP),
359  DEF_GPIOD( 2, GPIO_INPUT | GPIO_PULLUP),
360  DEF_GPIOD( 3, GPIO_INPUT | GPIO_PULLUP),
361  DEF_GPIOD( 4, GPIO_INPUT | GPIO_PULLUP),
362  DEF_GPIOD( 5, GPIO_INPUT | GPIO_PULLUP),
363  DEF_GPIOD( 6, GPIO_INPUT | GPIO_PULLUP),
364  DEF_GPIOD( 7, GPIO_INPUT | GPIO_PULLUP),
365  DEF_GPIOD( 8, GPIO_INPUT | GPIO_PULLUP),
366  DEF_GPIOD( 9, GPIO_INPUT | GPIO_PULLUP),
367  DEF_GPIOD(10, GPIO_INPUT | GPIO_PULLUP),
368  DEF_GPIOD(11, GPIO_INPUT | GPIO_PULLUP),
369  DEF_GPIOD(12, GPIO_INPUT | GPIO_PULLUP),
370  DEF_GPIOD(13, GPIO_INPUT | GPIO_PULLUP),
371  DEF_GPIOD(14, GPIO_INPUT | GPIO_PULLUP),
372  DEF_GPIOD(15, GPIO_INPUT | GPIO_PULLUP),
373 
374  DEF_GPIOE( 0, GPIO_INPUT | GPIO_PULLUP),
375  DEF_GPIOE( 1, GPIO_INPUT | GPIO_PULLUP),
376  DEF_GPIOE( 2, GPIO_INPUT | GPIO_PULLUP),
377  DEF_GPIOE( 3, GPIO_INPUT | GPIO_PULLUP),
378  DEF_GPIOE( 4, GPIO_INPUT | GPIO_PULLUP),
379  DEF_GPIOE( 5, GPIO_INPUT | GPIO_PULLUP),
380  DEF_GPIOE( 6, GPIO_INPUT | GPIO_PULLUP),
381  DEF_GPIOE( 7, GPIO_INPUT | GPIO_PULLUP),
382  DEF_GPIOE( 8, GPIO_INPUT | GPIO_PULLUP),
383  DEF_GPIOE( 9, GPIO_INPUT | GPIO_PULLUP),
384  DEF_GPIOE(10, GPIO_INPUT | GPIO_PULLUP),
385  DEF_GPIOE(11, GPIO_INPUT | GPIO_PULLUP),
386  DEF_GPIOE(12, GPIO_INPUT | GPIO_PULLUP),
387  DEF_GPIOE(13, GPIO_INPUT | GPIO_PULLUP),
388  DEF_GPIOE(14, GPIO_INPUT | GPIO_PULLUP),
389  DEF_GPIOE(15, GPIO_INPUT | GPIO_PULLUP),
390 
391  DEF_GPIOF( 0, GPIO_INPUT | GPIO_PULLUP),
392  DEF_GPIOF( 1, GPIO_INPUT | GPIO_PULLUP),
393  DEF_GPIOF( 2, GPIO_INPUT | GPIO_PULLUP),
394  DEF_GPIOF( 3, GPIO_INPUT | GPIO_PULLUP),
395  DEF_GPIOF( 4, GPIO_INPUT | GPIO_PULLUP),
396  DEF_GPIOF( 5, GPIO_INPUT | GPIO_PULLUP),
397  DEF_GPIOF( 6, GPIO_INPUT | GPIO_PULLUP),
398  DEF_GPIOF( 7, GPIO_INPUT | GPIO_PULLUP),
399  DEF_GPIOF( 8, GPIO_INPUT | GPIO_PULLUP),
400  DEF_GPIOF( 9, GPIO_OUTPUT_0),
401  DEF_GPIOF(10, GPIO_INPUT | GPIO_PULLUP),
402  DEF_GPIOF(11, GPIO_INPUT | GPIO_PULLUP),
403  DEF_GPIOF(12, GPIO_INPUT | GPIO_PULLUP),
404  DEF_GPIOF(13, GPIO_INPUT | GPIO_PULLUP),
405  DEF_GPIOF(14, GPIO_INPUT | GPIO_PULLUP),
406  DEF_GPIOF(15, GPIO_INPUT | GPIO_PULLUP),
407 
408  DEF_GPIOG( 0, GPIO_INPUT | GPIO_PULLUP),
409  DEF_GPIOG( 1, GPIO_INPUT | GPIO_PULLUP),
410  DEF_GPIOG( 2, GPIO_INPUT | GPIO_PULLUP),
411  DEF_GPIOG( 3, GPIO_INPUT | GPIO_PULLUP),
412  DEF_GPIOG( 4, GPIO_INPUT | GPIO_PULLUP),
413  DEF_GPIOG( 5, GPIO_INPUT | GPIO_PULLUP),
414  DEF_GPIOG( 6, GPIO_INPUT | GPIO_PULLUP),
415  DEF_GPIOG( 7, GPIO_INPUT | GPIO_PULLUP),
416  DEF_GPIOG( 8, GPIO_INPUT | GPIO_PULLUP),
417  DEF_GPIOG( 9, GPIO_INPUT | GPIO_PULLUP),
418  DEF_GPIOG(10, GPIO_INPUT | GPIO_PULLUP),
419  DEF_GPIOG(11, GPIO_INPUT | GPIO_PULLUP),
420  /* FIXME WD */
421  DEF_GPIOG(12, GPIO_OUTPUT_1),
422  DEF_GPIOG(13, GPIO_OUTPUT_1),
423  DEF_GPIOG(14, GPIO_OUTPUT_1),
424  DEF_GPIOG(15, GPIO_INPUT),
425 
426  // Crystal
427  //DEF_GPIOH( 0, GPIO_INPUT | GPIO_PULLUP),
428  //DEF_GPIOH( 1, GPIO_INPUT | GPIO_PULLUP),
429  DEF_GPIOH( 2, GPIO_INPUT | GPIO_PULLUP),
430  DEF_GPIOH( 3, GPIO_INPUT | GPIO_PULLUP),
431  DEF_GPIOH( 4, GPIO_INPUT | GPIO_PULLUP),
432  DEF_GPIOH( 5, GPIO_INPUT | GPIO_PULLUP),
433  DEF_GPIOH( 6, GPIO_INPUT | GPIO_PULLUP),
434  DEF_GPIOH( 7, GPIO_INPUT | GPIO_PULLUP),
435  DEF_GPIOH( 8, GPIO_INPUT | GPIO_PULLUP),
436  DEF_GPIOH( 9, GPIO_INPUT | GPIO_PULLUP),
437  DEF_GPIOH(10, GPIO_INPUT | GPIO_PULLUP),
438  DEF_GPIOH(11, GPIO_INPUT | GPIO_PULLUP),
439  DEF_GPIOH(12, GPIO_INPUT | GPIO_PULLUP),
440  DEF_GPIOH(13, GPIO_INPUT | GPIO_PULLUP),
441  DEF_GPIOH(14, GPIO_INPUT | GPIO_PULLUP),
442  DEF_GPIOH(15, GPIO_INPUT | GPIO_PULLUP),
443 
444  DEF_GPIOI( 0, GPIO_INPUT | GPIO_PULLUP),
445  DEF_GPIOI( 1, GPIO_INPUT | GPIO_PULLUP),
446  DEF_GPIOI( 2, GPIO_INPUT | GPIO_PULLUP),
447  DEF_GPIOI( 3, GPIO_INPUT | GPIO_PULLUP),
448  DEF_GPIOI( 4, GPIO_INPUT | GPIO_PULLUP),
449  DEF_GPIOI( 5, GPIO_INPUT | GPIO_PULLUP),
450  DEF_GPIOI( 6, GPIO_INPUT | GPIO_PULLUP),
451  DEF_GPIOI( 7, GPIO_INPUT | GPIO_PULLUP),
452  DEF_GPIOI( 8, GPIO_INPUT | GPIO_PULLUP),
453  DEF_GPIOI( 9, GPIO_INPUT | GPIO_PULLUP),
454  DEF_GPIOI(10, GPIO_INPUT | GPIO_PULLUP),
455  DEF_GPIOI(11, GPIO_INPUT | GPIO_PULLUP),
456 };
457 
458 status_e bsp_init(void)
459 {
460  status_e status;
461 
462  /* Set all pins to safe values */
463  gpio_setup_list(all_pins_safe_values, ARRAY_SIZE(all_pins_safe_values));
464 
465  time_init();
466 
467  bsp_pwm_leds_init(10*1000, LIGHTNESS_PWM_STEP, 0);
468 
469  retarget_init();
470 
471  /* Initialize the external RAM */
472  status = bsp_init_extRAM();
473  if (status != NO_ERROR)
474  {
475  return status;
476  }
477 
478  status = ram_test_basic((uint32_t *)0x60000000, 8*1024*1024);
479  if (status != NO_ERROR)
480  {
481  return status;
482  }
483 
484  load_init_external_ram();
485 
486  /* Setup auxiliary PSU for the camera */
487  status = psu_aux1_set(3000);
488  if (status != NO_ERROR)
489  {
490  return status;
491  }
492 
493  status = psu_aux0_set(1800);
494  if (status != NO_ERROR)
495  {
496  return status;
497  }
498 
499  status = bsp_light_init(10*1000, 255, 0);
500  if (status != NO_ERROR)
501  {
502  return status;
503  }
504 
505  status = bsp_buttons_init();
506  if (status != NO_ERROR)
507  {
508  return status;
509  }
510 
511  return NO_ERROR;
512 }
513 #endif
stm32f4xx_rcc.h
This file contains all the functions prototypes for the RCC firmware library.
FSMC_NORSRAMTimingInitTypeDef::FSMC_DataSetupTime
uint32_t FSMC_DataSetupTime
Definition: stm32f4xx_fsmc.h:59
FSMC_NORSRAMInitTypeDef::FSMC_WriteOperation
uint32_t FSMC_WriteOperation
Definition: stm32f4xx_fsmc.h:125
FSMC_NORSRAMInitTypeDef::FSMC_DataAddressMux
uint32_t FSMC_DataAddressMux
Definition: stm32f4xx_fsmc.h:93
bsp.h
BSP - Board Support Package.
DEF_GPIOF
#define DEF_GPIOF(__PIN, __MODE)
same as DEF_GPIOA for port F
Definition: stm32_gpio.h:364
retarget.h
stdio redirection
gpio_t::nr
uint8_t nr
Pin number (0 for GPIOx0, ... , 3 for GPIOx3, ...)
Definition: stm32_gpio.h:99
lightness_to_pwm.h
Handle non-linearity in human eye brightness sensitivity.
ram_test.h
RAM test.
TIM_CCMR2_OC4M_2
#define TIM_CCMR2_OC4M_2
Definition: stm32f4xx.h:6229
FSMC_NORSRAMInitTypeDef::FSMC_WaitSignalActive
uint32_t FSMC_WaitSignalActive
Definition: stm32f4xx_fsmc.h:120
GPIO_OUTPUT_1
Output (default 1)
Definition: stm32_gpio.h:53
BSP_BUTTON_NR
#define BSP_BUTTON_NR
Number of buttons.
Definition: bsp_armebs4.h:23
GPIO_PULLDOWN
pull down
Definition: stm32_gpio.h:86
FSMC_NORSRAMTimingInitTypeDef
Timing parameters For NOR/SRAM Banks.
Definition: stm32f4xx_fsmc.h:47
time.h
simple time abstraction
FSMC_NORSRAMInitTypeDef::FSMC_WrapMode
uint32_t FSMC_WrapMode
Definition: stm32f4xx_fsmc.h:116
FSMC_NORSRAMInitTypeDef::FSMC_Bank
uint32_t FSMC_Bank
Definition: stm32f4xx_fsmc.h:90
memcpy
void * memcpy(void *dest, const void *src, size_t n)
memset
void * memset(void *dest, int n, size_t n)
FSMC_NORSRAMInitTypeDef::FSMC_AsynchronousWait
uint32_t FSMC_AsynchronousWait
Definition: stm32f4xx_fsmc.h:108
DEF_GPIOB
#define DEF_GPIOB(__PIN, __MODE)
same as DEF_GPIOA for port B
Definition: stm32_gpio.h:360
TIM_CR1_CEN
#define TIM_CR1_CEN
Definition: stm32f4xx.h:6051
TIM_CCMR2_OC3M_2
#define TIM_CCMR2_OC3M_2
Definition: stm32f4xx.h:6215
TIM_CCMR1_OC2M_2
#define TIM_CCMR1_OC2M_2
Definition: stm32f4xx.h:6178
TIM_CCER_CC1E
#define TIM_CCER_CC1E
Definition: stm32f4xx.h:6256
FSMC_NORSRAMInitTypeDef
FSMC NOR/SRAM Init structure definition.
Definition: stm32f4xx_fsmc.h:88
stm32_manageable_psu.h
Manageable PSU with an enable and a digital potentiometer.
FSMC_NORSRAMInitTypeDef::FSMC_MemoryType
uint32_t FSMC_MemoryType
Definition: stm32f4xx_fsmc.h:97
lightness_to_pwm
uint8_t lightness_to_pwm(uint8_t percentage)
PWM value for driving a LED expressed as perceived percentage.
Definition: lightness_to_pwm.c:39
FSMC_NORSRAMInitTypeDef::FSMC_WriteTimingStruct
FSMC_NORSRAMTimingInitTypeDef * FSMC_WriteTimingStruct
Definition: stm32f4xx_fsmc.h:140
FSMC_NORSRAMTimingInitTypeDef::FSMC_AccessMode
uint32_t FSMC_AccessMode
Definition: stm32f4xx_fsmc.h:81
TIM_CCMR1_OC2PE
#define TIM_CCMR1_OC2PE
Definition: stm32f4xx.h:6173
DEF_GPIOD
#define DEF_GPIOD(__PIN, __MODE)
same as DEF_GPIOA for port D
Definition: stm32_gpio.h:362
gpio_get
static uint32_t gpio_get(const struct gpio_t *gpio)
Get gpio level.
Definition: stm32_gpio.h:219
TIM_CCMR1_OC2M_1
#define TIM_CCMR1_OC2M_1
Definition: stm32f4xx.h:6177
DEF_GPIOA
#define DEF_GPIOA(__PIN, __MODE)
Helper for defining a pin.
Definition: stm32_gpio.h:358
FSMC_NORSRAMTimingInitTypeDef::FSMC_AddressHoldTime
uint32_t FSMC_AddressHoldTime
Definition: stm32f4xx_fsmc.h:54
TIM_CCER_CC3E
#define TIM_CCER_CC3E
Definition: stm32f4xx.h:6264
TIM_CCMR2_OC3M_1
#define TIM_CCMR2_OC3M_1
Definition: stm32f4xx.h:6214
bsp_led_set
void bsp_led_set(uint32_t nr, uint32_t value)
Set a led (ON or OFF)
Definition: bsp_armebs4.c:244
DEF_GPIOG
#define DEF_GPIOG(__PIN, __MODE)
same as DEF_GPIOA for port G
Definition: stm32_gpio.h:365
TIM_CCMR2_OC4PE
#define TIM_CCMR2_OC4PE
Definition: stm32f4xx.h:6224
bsp_led_toggle
void bsp_led_toggle(uint32_t nr)
toggle a led
Definition: bsp_armebs4.c:249
stm32_mcp4552.h
Driver for mcp4552 digital potentiometer.
TIM_CCMR1_OC1M_2
#define TIM_CCMR1_OC1M_2
Definition: stm32f4xx.h:6164
TIM_CCMR1_OC1M_1
#define TIM_CCMR1_OC1M_1
Definition: stm32f4xx.h:6163
gpio_t
GPIO control structure.
Definition: stm32_gpio.h:96
FSMC_NORSRAMInitTypeDef::FSMC_WaitSignalPolarity
uint32_t FSMC_WaitSignalPolarity
Definition: stm32f4xx_fsmc.h:112
FSMC_NORSRAMInitTypeDef::FSMC_WriteBurst
uint32_t FSMC_WriteBurst
Definition: stm32f4xx_fsmc.h:135
GPIO_INPUT
Input.
Definition: stm32_gpio.h:44
FSMC_NORSRAMInitTypeDef::FSMC_ReadWriteTimingStruct
FSMC_NORSRAMTimingInitTypeDef * FSMC_ReadWriteTimingStruct
Definition: stm32f4xx_fsmc.h:138
TIM_CCER_CC2E
#define TIM_CCER_CC2E
Definition: stm32f4xx.h:6260
FSMC_NORSRAMTimingInitTypeDef::FSMC_CLKDivision
uint32_t FSMC_CLKDivision
Definition: stm32f4xx_fsmc.h:69
TIM_CCER_CC4E
#define TIM_CCER_CC4E
Definition: stm32f4xx.h:6268
stm32f4xx_fsmc.h
This file contains all the functions prototypes for the FSMC firmware library.
TIM_CR1_ARPE
#define TIM_CR1_ARPE
Definition: stm32f4xx.h:6061
FSMC_NORSRAMTimingInitTypeDef::FSMC_DataLatency
uint32_t FSMC_DataLatency
Definition: stm32f4xx_fsmc.h:73
LIGHTNESS_PWM_STEP
#define LIGHTNESS_PWM_STEP
Number a step for a pwm using lightness_to_pwm.
Definition: lightness_to_pwm.h:21
TIM_CCMR2_OC4M_1
#define TIM_CCMR2_OC4M_1
Definition: stm32f4xx.h:6228
FSMC_NORSRAMTimingInitTypeDef::FSMC_AddressSetupTime
uint32_t FSMC_AddressSetupTime
Definition: stm32f4xx_fsmc.h:49
TIM_EGR_UG
#define TIM_EGR_UG
Definition: stm32f4xx.h:6144
DEF_GPIOC
#define DEF_GPIOC(__PIN, __MODE)
same as DEF_GPIOA for port C
Definition: stm32_gpio.h:361
TIM_CCMR2_OC3PE
#define TIM_CCMR2_OC3PE
Definition: stm32f4xx.h:6210
FSMC_NORSRAMInitTypeDef::FSMC_BurstAccessMode
uint32_t FSMC_BurstAccessMode
Definition: stm32f4xx_fsmc.h:104
ram_test_basic
status_e ram_test_basic(uint32_t *base, size_t size)
Quickly test a RAM region.
Definition: ram_test.c:8
FSMC_NORSRAMTimingInitTypeDef::FSMC_BusTurnAroundDuration
uint32_t FSMC_BusTurnAroundDuration
Definition: stm32f4xx_fsmc.h:64
SystemClock
struct system_clock_t SystemClock
DEF_GPIOH
#define DEF_GPIOH(__PIN, __MODE)
same as DEF_GPIOA for port H
Definition: stm32_gpio.h:366
DEF_GPIOE
#define DEF_GPIOE(__PIN, __MODE)
same as DEF_GPIOA for port E
Definition: stm32_gpio.h:363
FSMC_NORSRAMInitTypeDef::FSMC_MemoryDataWidth
uint32_t FSMC_MemoryDataWidth
Definition: stm32f4xx_fsmc.h:101
GPIO_OUTPUT_0
Output (default 0)
Definition: stm32_gpio.h:50
gpio_setup_list
status_e gpio_setup_list(const struct gpio_t gpio[], size_t len)
Setup an array of gpio.
Definition: stm32_gpio.c:47
GPIO_SPEED_2
Output speed : 2 MHz.
Definition: stm32_gpio.h:68
FSMC_NORSRAMInitTypeDef::FSMC_WaitSignal
uint32_t FSMC_WaitSignal
Definition: stm32f4xx_fsmc.h:128
status_e
status_e
Known errors.
Definition: error.h:21
ARRAY_SIZE
#define ARRAY_SIZE(x)
Number of elements in the array.
Definition: utils.h:19
TIM_CCMR1_OC1PE
#define TIM_CCMR1_OC1PE
Definition: stm32f4xx.h:6159
NO_ERROR
No error.
Definition: error.h:28
FSMC_NORSRAMInitTypeDef::FSMC_ExtendedMode
uint32_t FSMC_ExtendedMode
Definition: stm32f4xx_fsmc.h:132
bsp_button_gpios
const struct gpio_t * bsp_button_gpios(void)
get buttons gpios
Definition: bsp_armebs4.c:350
DEF_GPIOI
#define DEF_GPIOI(__PIN, __MODE)
same as DEF_GPIOA for port I
Definition: stm32_gpio.h:367
GPIO_PULLUP
Pull up.
Definition: stm32_gpio.h:83
bsp_init
status_e bsp_init(void)
Initialize the whole board.
Definition: bsp_armebs4.c:525
bsp_button_get
uint32_t bsp_button_get(uint32_t nr)
Get a button.
Definition: bsp_armebs4.c:340
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