ARMEBS4  revision-26.06.2015
Macros | Typedefs | Enumerations
Configuration_section_for_CMSIS
Collaboration diagram for Configuration_section_for_CMSIS:

Macros

#define __CM4_REV
 Configuration of the Cortex-M4 Processor and Core Peripherals. More...
 
#define __MPU_PRESENT
 
#define __NVIC_PRIO_BITS
 
#define __Vendor_SysTickConfig
 

Typedefs

typedef enum IRQn IRQn_Type
 STM32F4XX Interrupt Number Definition, according to the selected device in Library_configuration_section.
 

Enumerations

enum  IRQn {
  NonMaskableInt_IRQn,
  MemoryManagement_IRQn,
  BusFault_IRQn,
  UsageFault_IRQn,
  SVCall_IRQn,
  DebugMonitor_IRQn,
  PendSV_IRQn,
  SysTick_IRQn,
  WWDG_IRQn,
  PVD_IRQn,
  TAMP_STAMP_IRQn,
  RTC_WKUP_IRQn,
  FLASH_IRQn,
  RCC_IRQn,
  EXTI0_IRQn,
  EXTI1_IRQn,
  EXTI2_IRQn,
  EXTI3_IRQn,
  EXTI4_IRQn,
  DMA1_Stream0_IRQn,
  DMA1_Stream1_IRQn,
  DMA1_Stream2_IRQn,
  DMA1_Stream3_IRQn,
  DMA1_Stream4_IRQn,
  DMA1_Stream5_IRQn,
  DMA1_Stream6_IRQn,
  ADC_IRQn,
  CAN1_TX_IRQn,
  CAN1_RX0_IRQn,
  CAN1_RX1_IRQn,
  CAN1_SCE_IRQn,
  EXTI9_5_IRQn,
  TIM1_BRK_TIM9_IRQn,
  TIM1_UP_TIM10_IRQn,
  TIM1_TRG_COM_TIM11_IRQn,
  TIM1_CC_IRQn,
  TIM2_IRQn,
  TIM3_IRQn,
  TIM4_IRQn,
  I2C1_EV_IRQn,
  I2C1_ER_IRQn,
  I2C2_EV_IRQn,
  I2C2_ER_IRQn,
  SPI1_IRQn,
  SPI2_IRQn,
  USART1_IRQn,
  USART2_IRQn,
  USART3_IRQn,
  EXTI15_10_IRQn,
  RTC_Alarm_IRQn,
  OTG_FS_WKUP_IRQn,
  TIM8_BRK_TIM12_IRQn,
  TIM8_UP_TIM13_IRQn,
  TIM8_TRG_COM_TIM14_IRQn,
  TIM8_CC_IRQn,
  DMA1_Stream7_IRQn,
  FSMC_IRQn,
  SDIO_IRQn,
  TIM5_IRQn,
  SPI3_IRQn,
  UART4_IRQn,
  UART5_IRQn,
  TIM6_DAC_IRQn,
  TIM7_IRQn,
  DMA2_Stream0_IRQn,
  DMA2_Stream1_IRQn,
  DMA2_Stream2_IRQn,
  DMA2_Stream3_IRQn,
  DMA2_Stream4_IRQn,
  ETH_IRQn,
  ETH_WKUP_IRQn,
  CAN2_TX_IRQn,
  CAN2_RX0_IRQn,
  CAN2_RX1_IRQn,
  CAN2_SCE_IRQn,
  OTG_FS_IRQn,
  DMA2_Stream5_IRQn,
  DMA2_Stream6_IRQn,
  DMA2_Stream7_IRQn,
  USART6_IRQn,
  I2C3_EV_IRQn,
  I2C3_ER_IRQn,
  OTG_HS_EP1_OUT_IRQn,
  OTG_HS_EP1_IN_IRQn,
  OTG_HS_WKUP_IRQn,
  OTG_HS_IRQn,
  DCMI_IRQn,
  CRYP_IRQn,
  HASH_RNG_IRQn,
  FPU_IRQn
}
 STM32F4XX Interrupt Number Definition, according to the selected device in Library_configuration_section. More...
 

Detailed Description

Macro Definition Documentation

#define __CM4_REV

Configuration of the Cortex-M4 Processor and Core Peripherals.

Core revision r0p1

Definition at line 118 of file stm32f4xx.h.

#define __MPU_PRESENT

STM32F4XX provides an MPU

Definition at line 119 of file stm32f4xx.h.

#define __NVIC_PRIO_BITS

STM32F4XX uses 4 Bits for the Priority Levels

Definition at line 120 of file stm32f4xx.h.

#define __Vendor_SysTickConfig

Set to 1 if different SysTick Config is used

Definition at line 121 of file stm32f4xx.h.

Enumeration Type Documentation

enum IRQn

STM32F4XX Interrupt Number Definition, according to the selected device in Library_configuration_section.

Enumerator
NonMaskableInt_IRQn 

2 Non Maskable Interrupt

MemoryManagement_IRQn 

4 Cortex-M4 Memory Management Interrupt

BusFault_IRQn 

5 Cortex-M4 Bus Fault Interrupt

UsageFault_IRQn 

6 Cortex-M4 Usage Fault Interrupt

SVCall_IRQn 

11 Cortex-M4 SV Call Interrupt

DebugMonitor_IRQn 

12 Cortex-M4 Debug Monitor Interrupt

PendSV_IRQn 

14 Cortex-M4 Pend SV Interrupt

SysTick_IRQn 

15 Cortex-M4 System Tick Interrupt

WWDG_IRQn 

Window WatchDog Interrupt

PVD_IRQn 

PVD through EXTI Line detection Interrupt

TAMP_STAMP_IRQn 

Tamper and TimeStamp interrupts through the EXTI line

RTC_WKUP_IRQn 

RTC Wakeup interrupt through the EXTI line

FLASH_IRQn 

FLASH global Interrupt

RCC_IRQn 

RCC global Interrupt

EXTI0_IRQn 

EXTI Line0 Interrupt

EXTI1_IRQn 

EXTI Line1 Interrupt

EXTI2_IRQn 

EXTI Line2 Interrupt

EXTI3_IRQn 

EXTI Line3 Interrupt

EXTI4_IRQn 

EXTI Line4 Interrupt

DMA1_Stream0_IRQn 

DMA1 Stream 0 global Interrupt

DMA1_Stream1_IRQn 

DMA1 Stream 1 global Interrupt

DMA1_Stream2_IRQn 

DMA1 Stream 2 global Interrupt

DMA1_Stream3_IRQn 

DMA1 Stream 3 global Interrupt

DMA1_Stream4_IRQn 

DMA1 Stream 4 global Interrupt

DMA1_Stream5_IRQn 

DMA1 Stream 5 global Interrupt

DMA1_Stream6_IRQn 

DMA1 Stream 6 global Interrupt

ADC_IRQn 

ADC1, ADC2 and ADC3 global Interrupts

CAN1_TX_IRQn 

CAN1 TX Interrupt

CAN1_RX0_IRQn 

CAN1 RX0 Interrupt

CAN1_RX1_IRQn 

CAN1 RX1 Interrupt

CAN1_SCE_IRQn 

CAN1 SCE Interrupt

EXTI9_5_IRQn 

External Line[9:5] Interrupts

TIM1_BRK_TIM9_IRQn 

TIM1 Break interrupt and TIM9 global interrupt

TIM1_UP_TIM10_IRQn 

TIM1 Update Interrupt and TIM10 global interrupt

TIM1_TRG_COM_TIM11_IRQn 

TIM1 Trigger and Commutation Interrupt and TIM11 global interrupt

TIM1_CC_IRQn 

TIM1 Capture Compare Interrupt

TIM2_IRQn 

TIM2 global Interrupt

TIM3_IRQn 

TIM3 global Interrupt

TIM4_IRQn 

TIM4 global Interrupt

I2C1_EV_IRQn 

I2C1 Event Interrupt

I2C1_ER_IRQn 

I2C1 Error Interrupt

I2C2_EV_IRQn 

I2C2 Event Interrupt

I2C2_ER_IRQn 

I2C2 Error Interrupt

SPI1_IRQn 

SPI1 global Interrupt

SPI2_IRQn 

SPI2 global Interrupt

USART1_IRQn 

USART1 global Interrupt

USART2_IRQn 

USART2 global Interrupt

USART3_IRQn 

USART3 global Interrupt

EXTI15_10_IRQn 

External Line[15:10] Interrupts

RTC_Alarm_IRQn 

RTC Alarm (A and B) through EXTI Line Interrupt

OTG_FS_WKUP_IRQn 

USB OTG FS Wakeup through EXTI line interrupt

TIM8_BRK_TIM12_IRQn 

TIM8 Break Interrupt and TIM12 global interrupt

TIM8_UP_TIM13_IRQn 

TIM8 Update Interrupt and TIM13 global interrupt

TIM8_TRG_COM_TIM14_IRQn 

TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt

TIM8_CC_IRQn 

TIM8 Capture Compare Interrupt

DMA1_Stream7_IRQn 

DMA1 Stream7 Interrupt

FSMC_IRQn 

FSMC global Interrupt

SDIO_IRQn 

SDIO global Interrupt

TIM5_IRQn 

TIM5 global Interrupt

SPI3_IRQn 

SPI3 global Interrupt

UART4_IRQn 

UART4 global Interrupt

UART5_IRQn 

UART5 global Interrupt

TIM6_DAC_IRQn 

TIM6 global and DAC1&2 underrun error interrupts

TIM7_IRQn 

TIM7 global interrupt

DMA2_Stream0_IRQn 

DMA2 Stream 0 global Interrupt

DMA2_Stream1_IRQn 

DMA2 Stream 1 global Interrupt

DMA2_Stream2_IRQn 

DMA2 Stream 2 global Interrupt

DMA2_Stream3_IRQn 

DMA2 Stream 3 global Interrupt

DMA2_Stream4_IRQn 

DMA2 Stream 4 global Interrupt

ETH_IRQn 

Ethernet global Interrupt

ETH_WKUP_IRQn 

Ethernet Wakeup through EXTI line Interrupt

CAN2_TX_IRQn 

CAN2 TX Interrupt

CAN2_RX0_IRQn 

CAN2 RX0 Interrupt

CAN2_RX1_IRQn 

CAN2 RX1 Interrupt

CAN2_SCE_IRQn 

CAN2 SCE Interrupt

OTG_FS_IRQn 

USB OTG FS global Interrupt

DMA2_Stream5_IRQn 

DMA2 Stream 5 global interrupt

DMA2_Stream6_IRQn 

DMA2 Stream 6 global interrupt

DMA2_Stream7_IRQn 

DMA2 Stream 7 global interrupt

USART6_IRQn 

USART6 global interrupt

I2C3_EV_IRQn 

I2C3 event interrupt

I2C3_ER_IRQn 

I2C3 error interrupt

OTG_HS_EP1_OUT_IRQn 

USB OTG HS End Point 1 Out global interrupt

OTG_HS_EP1_IN_IRQn 

USB OTG HS End Point 1 In global interrupt

OTG_HS_WKUP_IRQn 

USB OTG HS Wakeup through EXTI interrupt

OTG_HS_IRQn 

USB OTG HS global interrupt

DCMI_IRQn 

DCMI global interrupt

CRYP_IRQn 

CRYP crypto global interrupt

HASH_RNG_IRQn 

Hash and Rng global interrupt

FPU_IRQn 

FPU global interrupt

Definition at line 127 of file stm32f4xx.h.