ARMEBS4  revision-26.06.2015
stm32_gpio_irq.h
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1 /************************************************************************//**
2  * \file heivs/stm32_gpio_irq.h
3  * \brief GPIO interrupts
4  * \author marc dot pignat at hevs dot ch
5  * \defgroup gpio_irq GPIO Interrupts
6  * \ingroup gpio
7  * @{
8  ***************************************************************************/
9 #ifndef HEIVS_STM32_GPIO_IRQ_H
10 #define HEIVS_STM32_GPIO_IRQ_H
11 
12 #include "heivs/error.h"
13 #include "heivs/stm32_gpio.h"
14 
15 #ifdef __cplusplus
16  extern "C" {
17 #endif
18 
19 /**
20  * Gpio IRQ modes
21  */
23 {
24  GPIO_IRQ_MODE_DISABLED, ///< Disabled
25  GPIO_IRQ_MODE_EDGE_FALLING, ///< Falling edge
26  GPIO_IRQ_MODE_EDGE_RISING, ///< Rising edge
27  GPIO_IRQ_MODE_EDGE_BOTH, ///< Both edge
28  GPIO_IRQ_MODE_LEVEL_LOW, ///< Level low (emulated)
29  GPIO_IRQ_MODE_LEVEL_HIGH, ///< Level high (emulated)
30 };
31 
32 /**
33  * \brief Setup interrupt on GPIO
34  *
35  * \param gpio the [gpio](\ref gpio_t) to use (will be configured)
36  * \param handler handler's return value: see below
37  * \param mode #gpio_irq_mode_e of the interrupt
38  * \param prio the priority for the NVIC
39  *
40  * \return #NO_ERROR for no problem
41  *
42  * \warning ::GPIO_IRQ_MODE_LEVEL_LOW and ::GPIO_IRQ_MODE_LEVEL_HIGH interrupts
43  * are emulated.
44  *
45  * When using ::GPIO_IRQ_MODE_LEVEL_LOW and ::GPIO_IRQ_MODE_LEVEL_HIGH, the
46  * handler will be called continuously unless the pin level change to the
47  * inactive level. Deferred processing is possible, the handler can return true,
48  * and the loop will break. The deferred handler MUST call gpio_irq_restore()
49  * after the interrupt has been handled to restore normal behavior.
50  */
51 status_e gpio_irq_setup(const struct gpio_t *gpio, uint32_t (*handler)(const struct gpio_t *gpio), enum gpio_irq_mode_e mode, uint32_t prio);
52 
53 /**
54  * \brief Disable a gpio interrupt
55  *
56  * \param gpio the gpio to use
57  * \return #NO_ERROR for no problem
58  */
59 status_e gpio_irq_disable(const struct gpio_t *gpio);
60 
61 /**
62  * \brief Restore a gpio interrupt
63  *
64  * \param gpio the gpio to use
65  * \see used with gpio_irq_setup and ::GPIO_IRQ_MODE_LEVEL_LOW or ::GPIO_IRQ_MODE_LEVEL_HIGH
66  */
67 status_e gpio_irq_restore(const struct gpio_t *gpio);
68 
69 #ifdef __cplusplus
70 }
71 #endif
72 
73 /**
74  * @}
75  */
76 #endif /* HEIVS_STM32_GPIO_IRQ_H */
Level low (emulated)
gpio_irq_mode_e
status_e gpio_irq_disable(const struct gpio_t *gpio)
Disable a gpio interrupt.
Errors definitions.
status_e gpio_irq_setup(const struct gpio_t *gpio, uint32_t(*handler)(const struct gpio_t *gpio), enum gpio_irq_mode_e mode, uint32_t prio)
Setup interrupt on GPIO.
board specific defines
Level high (emulated)
GPIO control structure.
Definition: stm32_gpio.h:96
status_e
Known errors.
Definition: error.h:21
status_e gpio_irq_restore(const struct gpio_t *gpio)
Restore a gpio interrupt.