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revision-26.06.2015
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include
heivs
stm32_gpio_irq.h
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/************************************************************************/
/**
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* \file heivs/stm32_gpio_irq.h
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* \brief GPIO interrupts
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* \author marc dot pignat at hevs dot ch
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* \defgroup gpio_irq GPIO Interrupts
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* \ingroup gpio
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* @{
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***************************************************************************/
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#ifndef HEIVS_STM32_GPIO_IRQ_H
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#define HEIVS_STM32_GPIO_IRQ_H
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#include "
heivs/error.h
"
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#include "
heivs/stm32_gpio.h
"
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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/**
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* Gpio IRQ modes
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*/
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enum
gpio_irq_mode_e
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{
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GPIO_IRQ_MODE_DISABLED
,
///< Disabled
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GPIO_IRQ_MODE_EDGE_FALLING
,
///< Falling edge
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GPIO_IRQ_MODE_EDGE_RISING
,
///< Rising edge
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GPIO_IRQ_MODE_EDGE_BOTH
,
///< Both edge
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GPIO_IRQ_MODE_LEVEL_LOW
,
///< Level low (emulated)
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GPIO_IRQ_MODE_LEVEL_HIGH
,
///< Level high (emulated)
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};
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/**
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* \brief Setup interrupt on GPIO
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*
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* \param gpio the [gpio](\ref gpio_t) to use (will be configured)
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* \param handler handler's return value: see below
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* \param mode #gpio_irq_mode_e of the interrupt
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* \param prio the priority for the NVIC
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*
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* \return #NO_ERROR for no problem
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*
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* \warning ::GPIO_IRQ_MODE_LEVEL_LOW and ::GPIO_IRQ_MODE_LEVEL_HIGH interrupts
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* are emulated.
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*
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* When using ::GPIO_IRQ_MODE_LEVEL_LOW and ::GPIO_IRQ_MODE_LEVEL_HIGH, the
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* handler will be called continuously unless the pin level change to the
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* inactive level. Deferred processing is possible, the handler can return true,
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* and the loop will break. The deferred handler MUST call gpio_irq_restore()
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* after the interrupt has been handled to restore normal behavior.
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*/
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status_e
gpio_irq_setup
(
const
struct
gpio_t
*gpio, uint32_t (*handler)(
const
struct
gpio_t
*gpio),
enum
gpio_irq_mode_e
mode, uint32_t prio);
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/**
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* \brief Disable a gpio interrupt
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*
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* \param gpio the gpio to use
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* \return #NO_ERROR for no problem
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*/
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status_e
gpio_irq_disable
(
const
struct
gpio_t
*gpio);
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/**
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* \brief Restore a gpio interrupt
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*
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* \param gpio the gpio to use
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* \see used with gpio_irq_setup and ::GPIO_IRQ_MODE_LEVEL_LOW or ::GPIO_IRQ_MODE_LEVEL_HIGH
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*/
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status_e
gpio_irq_restore
(
const
struct
gpio_t
*gpio);
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#ifdef __cplusplus
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}
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#endif
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/**
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* @}
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*/
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#endif
/* HEIVS_STM32_GPIO_IRQ_H */
GPIO_IRQ_MODE_LEVEL_LOW
Level low (emulated)
Definition:
stm32_gpio_irq.h:28
gpio_irq_mode_e
gpio_irq_mode_e
Definition:
stm32_gpio_irq.h:22
gpio_irq_disable
status_e gpio_irq_disable(const struct gpio_t *gpio)
Disable a gpio interrupt.
Definition:
stm32_gpio_irq.c:44
error.h
Errors definitions.
gpio_irq_setup
status_e gpio_irq_setup(const struct gpio_t *gpio, uint32_t(*handler)(const struct gpio_t *gpio), enum gpio_irq_mode_e mode, uint32_t prio)
Setup interrupt on GPIO.
Definition:
stm32_gpio_irq.c:217
GPIO_IRQ_MODE_DISABLED
Disabled.
Definition:
stm32_gpio_irq.h:24
stm32_gpio.h
board specific defines
GPIO_IRQ_MODE_LEVEL_HIGH
Level high (emulated)
Definition:
stm32_gpio_irq.h:29
gpio_t
GPIO control structure.
Definition:
stm32_gpio.h:96
GPIO_IRQ_MODE_EDGE_BOTH
Both edge.
Definition:
stm32_gpio_irq.h:27
GPIO_IRQ_MODE_EDGE_RISING
Rising edge.
Definition:
stm32_gpio_irq.h:26
status_e
status_e
Known errors.
Definition:
error.h:21
GPIO_IRQ_MODE_EDGE_FALLING
Falling edge.
Definition:
stm32_gpio_irq.h:25
gpio_irq_restore
status_e gpio_irq_restore(const struct gpio_t *gpio)
Restore a gpio interrupt.
Definition:
stm32_gpio_irq.c:183
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