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ARMEBS4
revision-26.06.2015
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Controller Area Network. More...
#include "C:/Programs/ARMEBS4/current/doc/eclipse-doc/ext/libheivs_stm32/include/stm32/stm32f4xx.h"
Data Fields | |
__IO uint32_t | MCR |
__IO uint32_t | MSR |
__IO uint32_t | TSR |
__IO uint32_t | RF0R |
__IO uint32_t | RF1R |
__IO uint32_t | IER |
__IO uint32_t | ESR |
__IO uint32_t | BTR |
uint32_t | RESERVED0 [88] |
CAN_TxMailBox_TypeDef | sTxMailBox [3] |
CAN_FIFOMailBox_TypeDef | sFIFOMailBox [2] |
uint32_t | RESERVED1 [12] |
__IO uint32_t | FMR |
__IO uint32_t | FM1R |
uint32_t | RESERVED2 |
__IO uint32_t | FS1R |
uint32_t | RESERVED3 |
__IO uint32_t | FFA1R |
uint32_t | RESERVED4 |
__IO uint32_t | FA1R |
uint32_t | RESERVED5 [8] |
CAN_FilterRegister_TypeDef | sFilterRegister [28] |
Controller Area Network.
Definition at line 364 of file stm32f4xx.h.
__IO uint32_t CAN_TypeDef::MCR |
CAN master control register, Address offset: 0x00
Definition at line 366 of file stm32f4xx.h.
__IO uint32_t CAN_TypeDef::MSR |
CAN master status register, Address offset: 0x04
Definition at line 367 of file stm32f4xx.h.
__IO uint32_t CAN_TypeDef::TSR |
CAN transmit status register, Address offset: 0x08
Definition at line 368 of file stm32f4xx.h.
__IO uint32_t CAN_TypeDef::RF0R |
CAN receive FIFO 0 register, Address offset: 0x0C
Definition at line 369 of file stm32f4xx.h.
__IO uint32_t CAN_TypeDef::RF1R |
CAN receive FIFO 1 register, Address offset: 0x10
Definition at line 370 of file stm32f4xx.h.
__IO uint32_t CAN_TypeDef::IER |
CAN interrupt enable register, Address offset: 0x14
Definition at line 371 of file stm32f4xx.h.
__IO uint32_t CAN_TypeDef::ESR |
CAN error status register, Address offset: 0x18
Definition at line 372 of file stm32f4xx.h.
__IO uint32_t CAN_TypeDef::BTR |
CAN bit timing register, Address offset: 0x1C
Definition at line 373 of file stm32f4xx.h.
uint32_t CAN_TypeDef::RESERVED0[88] |
Reserved, 0x020 - 0x17F
Definition at line 374 of file stm32f4xx.h.
CAN_TxMailBox_TypeDef CAN_TypeDef::sTxMailBox[3] |
CAN Tx MailBox, Address offset: 0x180 - 0x1AC
Definition at line 375 of file stm32f4xx.h.
CAN_FIFOMailBox_TypeDef CAN_TypeDef::sFIFOMailBox[2] |
CAN FIFO MailBox, Address offset: 0x1B0 - 0x1CC
Definition at line 376 of file stm32f4xx.h.
uint32_t CAN_TypeDef::RESERVED1[12] |
Reserved, 0x1D0 - 0x1FF
Definition at line 377 of file stm32f4xx.h.
__IO uint32_t CAN_TypeDef::FMR |
CAN filter master register, Address offset: 0x200
Definition at line 378 of file stm32f4xx.h.
__IO uint32_t CAN_TypeDef::FM1R |
CAN filter mode register, Address offset: 0x204
Definition at line 379 of file stm32f4xx.h.
uint32_t CAN_TypeDef::RESERVED2 |
Reserved, 0x208
Definition at line 380 of file stm32f4xx.h.
__IO uint32_t CAN_TypeDef::FS1R |
CAN filter scale register, Address offset: 0x20C
Definition at line 381 of file stm32f4xx.h.
uint32_t CAN_TypeDef::RESERVED3 |
Reserved, 0x210
Definition at line 382 of file stm32f4xx.h.
__IO uint32_t CAN_TypeDef::FFA1R |
CAN filter FIFO assignment register, Address offset: 0x214
Definition at line 383 of file stm32f4xx.h.
uint32_t CAN_TypeDef::RESERVED4 |
Reserved, 0x218
Definition at line 384 of file stm32f4xx.h.
__IO uint32_t CAN_TypeDef::FA1R |
CAN filter activation register, Address offset: 0x21C
Definition at line 385 of file stm32f4xx.h.
uint32_t CAN_TypeDef::RESERVED5[8] |
Reserved, 0x220-0x23F
Definition at line 386 of file stm32f4xx.h.
CAN_FilterRegister_TypeDef CAN_TypeDef::sFilterRegister[28] |
CAN Filter Register, Address offset: 0x240-0x31C
Definition at line 387 of file stm32f4xx.h.