![]() |
ARMEBS4
revision-26.06.2015
|
Flexible Static Memory Controller Bank1E. More...
#include "C:/Programs/ARMEBS4/current/doc/eclipse-doc/ext/libheivs_stm32/include/stm32/stm32f4xx.h"
Data Fields | |
__IO uint32_t | BWTR [7] |
Flexible Static Memory Controller Bank1E.
Definition at line 593 of file stm32f4xx.h.
__IO uint32_t FSMC_Bank1E_TypeDef::BWTR[7] |
NOR/PSRAM write timing registers, Address offset: 0x104-0x11C
Definition at line 595 of file stm32f4xx.h.