ARMEBS4  revision-26.06.2015
Data Fields
FSMC_Bank2_TypeDef Struct Reference

Flexible Static Memory Controller Bank2. More...

#include "C:/Programs/ARMEBS4/current/doc/eclipse-doc/ext/libheivs_stm32/include/stm32/stm32f4xx.h"

Collaboration diagram for FSMC_Bank2_TypeDef:
Collaboration graph

Data Fields

__IO uint32_t PCR2
 
__IO uint32_t SR2
 
__IO uint32_t PMEM2
 
__IO uint32_t PATT2
 
uint32_t RESERVED0
 
__IO uint32_t ECCR2
 

Detailed Description

Flexible Static Memory Controller Bank2.

Definition at line 602 of file stm32f4xx.h.

Field Documentation

__IO uint32_t FSMC_Bank2_TypeDef::PCR2

NAND Flash control register 2, Address offset: 0x60

Definition at line 604 of file stm32f4xx.h.

__IO uint32_t FSMC_Bank2_TypeDef::SR2

NAND Flash FIFO status and interrupt register 2, Address offset: 0x64

Definition at line 605 of file stm32f4xx.h.

__IO uint32_t FSMC_Bank2_TypeDef::PMEM2

NAND Flash Common memory space timing register 2, Address offset: 0x68

Definition at line 606 of file stm32f4xx.h.

__IO uint32_t FSMC_Bank2_TypeDef::PATT2

NAND Flash Attribute memory space timing register 2, Address offset: 0x6C

Definition at line 607 of file stm32f4xx.h.

uint32_t FSMC_Bank2_TypeDef::RESERVED0

Reserved, 0x70

Definition at line 608 of file stm32f4xx.h.

__IO uint32_t FSMC_Bank2_TypeDef::ECCR2

NAND Flash ECC result registers 2, Address offset: 0x74

Definition at line 609 of file stm32f4xx.h.