ARMEBS4  revision-26.06.2015
Data Fields
FSMC_Bank3_TypeDef Struct Reference

Flexible Static Memory Controller Bank3. More...

#include "C:/Programs/ARMEBS4/current/doc/eclipse-doc/ext/libheivs_stm32/include/stm32/stm32f4xx.h"

Collaboration diagram for FSMC_Bank3_TypeDef:
Collaboration graph

Data Fields

__IO uint32_t PCR3
 
__IO uint32_t SR3
 
__IO uint32_t PMEM3
 
__IO uint32_t PATT3
 
uint32_t RESERVED0
 
__IO uint32_t ECCR3
 

Detailed Description

Flexible Static Memory Controller Bank3.

Definition at line 616 of file stm32f4xx.h.

Field Documentation

__IO uint32_t FSMC_Bank3_TypeDef::PCR3

NAND Flash control register 3, Address offset: 0x80

Definition at line 618 of file stm32f4xx.h.

__IO uint32_t FSMC_Bank3_TypeDef::SR3

NAND Flash FIFO status and interrupt register 3, Address offset: 0x84

Definition at line 619 of file stm32f4xx.h.

__IO uint32_t FSMC_Bank3_TypeDef::PMEM3

NAND Flash Common memory space timing register 3, Address offset: 0x88

Definition at line 620 of file stm32f4xx.h.

__IO uint32_t FSMC_Bank3_TypeDef::PATT3

NAND Flash Attribute memory space timing register 3, Address offset: 0x8C

Definition at line 621 of file stm32f4xx.h.

uint32_t FSMC_Bank3_TypeDef::RESERVED0

Reserved, 0x90

Definition at line 622 of file stm32f4xx.h.

__IO uint32_t FSMC_Bank3_TypeDef::ECCR3

NAND Flash ECC result registers 3, Address offset: 0x94

Definition at line 623 of file stm32f4xx.h.