TIM_TypeDef Struct Reference

TIM. More...

#include "C:/Programs/ARMEBS4/current/doc/eclipse-doc/ext/libheivs_stm32/include/stm32/stm32f4xx.h"

Collaboration diagram for TIM_TypeDef:

Data Fields
__IO uint16_t	CR1
uint16_t	RESERVED0
__IO uint16_t	CR2
uint16_t	RESERVED1
__IO uint16_t	SMCR
uint16_t	RESERVED2
__IO uint16_t	DIER
uint16_t	RESERVED3
__IO uint16_t	SR
uint16_t	RESERVED4
__IO uint16_t	EGR
uint16_t	RESERVED5
__IO uint16_t	CCMR1
uint16_t	RESERVED6
__IO uint16_t	CCMR2
uint16_t	RESERVED7
__IO uint16_t	CCER
uint16_t	RESERVED8
__IO uint32_t	CNT
__IO uint16_t	PSC
uint16_t	RESERVED9
__IO uint32_t	ARR
__IO uint16_t	RCR
uint16_t	RESERVED10
__IO uint32_t	CCR1
__IO uint32_t	CCR2
__IO uint32_t	CCR3
__IO uint32_t	CCR4
__IO uint16_t	BDTR
uint16_t	RESERVED11
__IO uint16_t	DCR
uint16_t	RESERVED12
__IO uint16_t	DMAR
uint16_t	RESERVED13
__IO uint16_t	OR
uint16_t	RESERVED14

Detailed Description

TIM.

Definition at line 862 of file stm32f4xx.h.

Field Documentation

__IO uint16_t TIM_TypeDef::CR1

TIM control register 1, Address offset: 0x00

Definition at line 864 of file stm32f4xx.h.

uint16_t TIM_TypeDef::RESERVED0

Reserved, 0x02

Definition at line 865 of file stm32f4xx.h.

__IO uint16_t TIM_TypeDef::CR2

TIM control register 2, Address offset: 0x04

Definition at line 866 of file stm32f4xx.h.

uint16_t TIM_TypeDef::RESERVED1

Reserved, 0x06

Definition at line 867 of file stm32f4xx.h.

__IO uint16_t TIM_TypeDef::SMCR

TIM slave mode control register, Address offset: 0x08

Definition at line 868 of file stm32f4xx.h.

uint16_t TIM_TypeDef::RESERVED2

Reserved, 0x0A

Definition at line 869 of file stm32f4xx.h.

__IO uint16_t TIM_TypeDef::DIER

TIM DMA/interrupt enable register, Address offset: 0x0C

Definition at line 870 of file stm32f4xx.h.

uint16_t TIM_TypeDef::RESERVED3

Reserved, 0x0E

Definition at line 871 of file stm32f4xx.h.

__IO uint16_t TIM_TypeDef::SR

TIM status register, Address offset: 0x10

Definition at line 872 of file stm32f4xx.h.

uint16_t TIM_TypeDef::RESERVED4

Reserved, 0x12

Definition at line 873 of file stm32f4xx.h.

__IO uint16_t TIM_TypeDef::EGR

TIM event generation register, Address offset: 0x14

Definition at line 874 of file stm32f4xx.h.

uint16_t TIM_TypeDef::RESERVED5

Reserved, 0x16

Definition at line 875 of file stm32f4xx.h.

__IO uint16_t TIM_TypeDef::CCMR1

TIM capture/compare mode register 1, Address offset: 0x18

Definition at line 876 of file stm32f4xx.h.

uint16_t TIM_TypeDef::RESERVED6

Reserved, 0x1A

Definition at line 877 of file stm32f4xx.h.

__IO uint16_t TIM_TypeDef::CCMR2

TIM capture/compare mode register 2, Address offset: 0x1C

Definition at line 878 of file stm32f4xx.h.

uint16_t TIM_TypeDef::RESERVED7

Reserved, 0x1E

Definition at line 879 of file stm32f4xx.h.

__IO uint16_t TIM_TypeDef::CCER

TIM capture/compare enable register, Address offset: 0x20

Definition at line 880 of file stm32f4xx.h.

uint16_t TIM_TypeDef::RESERVED8

Reserved, 0x22

Definition at line 881 of file stm32f4xx.h.

__IO uint32_t TIM_TypeDef::CNT

TIM counter register, Address offset: 0x24

Definition at line 882 of file stm32f4xx.h.

__IO uint16_t TIM_TypeDef::PSC

TIM prescaler, Address offset: 0x28

Definition at line 883 of file stm32f4xx.h.

uint16_t TIM_TypeDef::RESERVED9

Reserved, 0x2A

Definition at line 884 of file stm32f4xx.h.

__IO uint32_t TIM_TypeDef::ARR

TIM auto-reload register, Address offset: 0x2C

Definition at line 885 of file stm32f4xx.h.

__IO uint16_t TIM_TypeDef::RCR

TIM repetition counter register, Address offset: 0x30

Definition at line 886 of file stm32f4xx.h.

uint16_t TIM_TypeDef::RESERVED10

Reserved, 0x32

Definition at line 887 of file stm32f4xx.h.

__IO uint32_t TIM_TypeDef::CCR1

TIM capture/compare register 1, Address offset: 0x34

Definition at line 888 of file stm32f4xx.h.

Referenced by bsp_led_toggle().

__IO uint32_t TIM_TypeDef::CCR2

TIM capture/compare register 2, Address offset: 0x38

Definition at line 889 of file stm32f4xx.h.

__IO uint32_t TIM_TypeDef::CCR3

TIM capture/compare register 3, Address offset: 0x3C

Definition at line 890 of file stm32f4xx.h.

__IO uint32_t TIM_TypeDef::CCR4

TIM capture/compare register 4, Address offset: 0x40

Definition at line 891 of file stm32f4xx.h.

__IO uint16_t TIM_TypeDef::BDTR

TIM break and dead-time register, Address offset: 0x44

Definition at line 892 of file stm32f4xx.h.

uint16_t TIM_TypeDef::RESERVED11

Reserved, 0x46

Definition at line 893 of file stm32f4xx.h.

__IO uint16_t TIM_TypeDef::DCR

TIM DMA control register, Address offset: 0x48

Definition at line 894 of file stm32f4xx.h.

uint16_t TIM_TypeDef::RESERVED12

Reserved, 0x4A

Definition at line 895 of file stm32f4xx.h.

__IO uint16_t TIM_TypeDef::DMAR

TIM DMA address for full transfer, Address offset: 0x4C

Definition at line 896 of file stm32f4xx.h.

uint16_t TIM_TypeDef::RESERVED13

Reserved, 0x4E

Definition at line 897 of file stm32f4xx.h.

__IO uint16_t TIM_TypeDef::OR

TIM option register, Address offset: 0x50

Definition at line 898 of file stm32f4xx.h.

uint16_t TIM_TypeDef::RESERVED14

Reserved, 0x52

Definition at line 899 of file stm32f4xx.h.