stm32_spi.h

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/************************************************************************//**
 * \file    heivs/stm32_spi.h
 * \brief   SPI bus
 * \author  marc dot pignat at hevs dot ch
 *
 * \defgroup spi_bus SPI bus
 * @{
 * \brief SPI (Serial Peripheral Interface) bus.
 * \ingroup bus
 *
 * \warning At this time only the master functionality of the bus is
 * implemented.
 ***************************************************************************/
#ifndef HEIVS_STM32_SPI_H
#define HEIVS_STM32_SPI_H

#include "heivs/bus.h"
#include "heivs/stm32_gpio.h"
#include "heivs/bsp.h"

/**
 * \brief SPI specific options
 */
enum spi_option_e
{
    SPI_OPTION_MASTER       = (0<< 1),  ///< Master mode
    SPI_OPTION_SLAVE        = (1<< 1),  ///< Slave mode \warning Not yet implemented

    SPI_OPTION_MODE_0       = (0<< 2),  ///< Mode 0 : CPOL = 0, CPHA = 0
    SPI_OPTION_MODE_1       = (1<< 2),  ///< Mode 1 : CPOL = 0, CPHA = 1
    SPI_OPTION_MODE_2       = (2<< 2),  ///< Mode 2 : CPOL = 1, CPHA = 0
    SPI_OPTION_MODE_3       = (3<< 2),  ///< Mode 3 : CPOL = 1, CPHA = 1

    SPI_OPTION_CS_LOW       = (0<< 4),  ///< Chip select active low
    SPI_OPTION_CS_HIGH      = (1<< 4),  ///< Chip select active high
};

/**
 * \brief SPI specific data
 */
struct spi_bus_private_t
{
    SPI_TypeDef *ctrl;              ///< Controller
    const struct gpio_t gpios[4];   ///< Gpios
    enum spi_option_e options;      ///< Options
};

#ifdef __cplusplus
    extern "C" {
#endif

/**
 * \brief All SPI busses
 */
extern const struct heivs_bus_t bus_spi[BSP_SPI_BUS_COUNT];

#ifdef __cplusplus
}
#endif

/**
 * @}
 */
#endif /* HEIVS_STM32_SPI_H */